path: root/arch/sh/boards/titan
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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 14:57:44 +0900
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 14:57:44 +0900
commit298476220d1f793ca0ac6c9e5dc817e1ad3e9851 (patch)
tree59cff744ad1837844cb7a5a43a0623d39058fb44 /arch/sh/boards/titan
parent749cf486920bf53f16e6a6889d9635a91ffb6c82 (diff)
sh: Add control register barriers.
Currently when making changes to control registers, we typically need some time for changes to take effect (8 nops, generally). However, for sh4a we simply need to do an icbi.. This is a simple patch for implementing a general purpose ctrl_barrier() which functions as a control register write barrier. There's some additional documentation in the patch itself, but it's pretty self explanatory. There were also some places where we were not doing the barrier, which didn't seem to have any adverse effects on legacy parts, but certainly did on sh4a. It's safer to have the barrier in place for legacy parts as well in these cases, though this does make flush_tlb_all() more expensive (by an order of 8 nops). We can ifdef around the flush_tlb_all() case for now if it's clear that all legacy parts won't have a problem with this. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/titan')
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