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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 16:43:28 +0900
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 16:43:28 +0900
commit959f85f8a3223c116bbe95dd8a9b207790b5d4d3 (patch)
treee7da9ccf292f860bfa0ff9cc8b2682cd1d6bad4d /arch/sh/boards/landisk
parente108b2ca2349f510ce7d7f910eda89f71d710d84 (diff)
downloadlinux-2.6.34-ux500-959f85f8a3223c116bbe95dd8a9b207790b5d4d3.tar.gz
sh: Consolidated SH7751/SH7780 PCI support.
This cleans up quite a lot of the PCI mess that we currently have, and attempts to consolidate the duplication in the SH7780 and SH7751 PCI controllers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/landisk')
-rw-r--r--arch/sh/boards/landisk/Makefile2
-rw-r--r--arch/sh/boards/landisk/io.c100
2 files changed, 33 insertions, 69 deletions
diff --git a/arch/sh/boards/landisk/Makefile b/arch/sh/boards/landisk/Makefile
index 60e75c6db0e..89e4beb2ad4 100644
--- a/arch/sh/boards/landisk/Makefile
+++ b/arch/sh/boards/landisk/Makefile
@@ -3,5 +3,3 @@
#
obj-y := setup.o io.o irq.o rtc.o landisk_pwb.o
-
-obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/sh/boards/landisk/io.c b/arch/sh/boards/landisk/io.c
index aa6b145c9e8..92498b4947d 100644
--- a/arch/sh/boards/landisk/io.c
+++ b/arch/sh/boards/landisk/io.c
@@ -14,39 +14,16 @@
* modifed by kogiidena
* 2005.03.03
*/
-
#include <linux/kernel.h>
#include <linux/types.h>
+#include <linux/pci.h>
#include <asm/landisk/iodata_landisk.h>
#include <asm/addrspace.h>
#include <asm/io.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-#include "../../drivers/pci/pci-sh7751.h"
-
extern void *area5_io_base; /* Area 5 I/O Base address */
extern void *area6_io_base; /* Area 6 I/O Base address */
-/*
- * The 7751R LANDISK uses the built-in PCI controller (PCIC)
- * of the 7751R processor, and has a SuperIO accessible via the PCI.
- * The board also includes a PCMCIA controller on its memory bus,
- * like the other Solution Engine boards.
- */
-
-#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
-#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
-#define PCI_IO_AREA SH7751_PCI_IO_BASE
-#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
-
-#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
-
-static inline void delay(void)
-{
- ctrl_inw(0xa0000000);
-}
-
static inline unsigned long port2adr(unsigned int port)
{
if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
@@ -67,17 +44,6 @@ static inline unsigned long port2adr(unsigned int port)
return port;
}
-/* In case someone configures the kernel w/o PCI support: in that */
-/* scenario, don't ever bother to check for PCI-window addresses */
-
-/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
-#if defined(CONFIG_PCI)
-#define CHECK_SH7751_PCIIO(port) \
- ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
-#else
-#define CHECK_SH_7751_PCIIO(port) (0)
-#endif
-
/*
* General outline: remap really low stuff [eventually] to SuperIO,
* stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -89,8 +55,8 @@ u8 landisk_inb(unsigned long port)
{
if (PXSEG(port))
return ctrl_inb(port);
- else if (CHECK_SH7751_PCIIO(port))
- return ctrl_inb(PCI_IOMAP(port));
+ else if (is_pci_ioaddr(port))
+ return ctrl_inb(pci_ioaddr(port));
return ctrl_inw(port2adr(port)) & 0xff;
}
@@ -101,12 +67,12 @@ u8 landisk_inb_p(unsigned long port)
if (PXSEG(port))
v = ctrl_inb(port);
- else if (CHECK_SH7751_PCIIO(port))
- v = ctrl_inb(PCI_IOMAP(port));
+ else if (is_pci_ioaddr(port))
+ v = ctrl_inb(pci_ioaddr(port));
else
v = ctrl_inw(port2adr(port)) & 0xff;
- delay();
+ ctrl_delay();
return v;
}
@@ -115,8 +81,8 @@ u16 landisk_inw(unsigned long port)
{
if (PXSEG(port))
return ctrl_inw(port);
- else if (CHECK_SH7751_PCIIO(port))
- return ctrl_inw(PCI_IOMAP(port));
+ else if (is_pci_ioaddr(port))
+ return ctrl_inw(pci_ioaddr(port));
else
maybebadio(port);
@@ -127,8 +93,8 @@ u32 landisk_inl(unsigned long port)
{
if (PXSEG(port))
return ctrl_inl(port);
- else if (CHECK_SH7751_PCIIO(port))
- return ctrl_inl(PCI_IOMAP(port));
+ else if (is_pci_ioaddr(port))
+ return ctrl_inl(pci_ioaddr(port));
else
maybebadio(port);
@@ -139,8 +105,8 @@ void landisk_outb(u8 value, unsigned long port)
{
if (PXSEG(port))
ctrl_outb(value, port);
- else if (CHECK_SH7751_PCIIO(port))
- ctrl_outb(value, PCI_IOMAP(port));
+ else if (is_pci_ioaddr(port))
+ ctrl_outb(value, pci_ioaddr(port));
else
ctrl_outw(value, port2adr(port));
}
@@ -149,19 +115,19 @@ void landisk_outb_p(u8 value, unsigned long port)
{
if (PXSEG(port))
ctrl_outb(value, port);
- else if (CHECK_SH7751_PCIIO(port))
- ctrl_outb(value, PCI_IOMAP(port));
+ else if (is_pci_ioaddr(port))
+ ctrl_outb(value, pci_ioaddr(port));
else
ctrl_outw(value, port2adr(port));
- delay();
+ ctrl_delay();
}
void landisk_outw(u16 value, unsigned long port)
{
if (PXSEG(port))
ctrl_outw(value, port);
- else if (CHECK_SH7751_PCIIO(port))
- ctrl_outw(value, PCI_IOMAP(port));
+ else if (is_pci_ioaddr(port))
+ ctrl_outw(value, pci_ioaddr(port));
else
maybebadio(port);
}
@@ -170,8 +136,8 @@ void landisk_outl(u32 value, unsigned long port)
{
if (PXSEG(port))
ctrl_outl(value, port);
- else if (CHECK_SH7751_PCIIO(port))
- ctrl_outl(value, PCI_IOMAP(port));
+ else if (is_pci_ioaddr(port))
+ ctrl_outl(value, pci_ioaddr(port));
else
maybebadio(port);
}
@@ -184,8 +150,8 @@ void landisk_insb(unsigned long port, void *dst, unsigned long count)
if (PXSEG(port)) {
while (count--)
*buf++ = *(volatile u8 *)port;
- } else if (CHECK_SH7751_PCIIO(port)) {
- volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port);
+ } else if (is_pci_ioaddr(port)) {
+ volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*buf++ = *bp;
@@ -203,8 +169,8 @@ void landisk_insw(unsigned long port, void *dst, unsigned long count)
if (PXSEG(port))
p = (volatile u16 *)port;
- else if (CHECK_SH7751_PCIIO(port))
- p = (volatile u16 *)PCI_IOMAP(port);
+ else if (is_pci_ioaddr(port))
+ p = (volatile u16 *)pci_ioaddr(port);
else
p = (volatile u16 *)port2adr(port);
while (count--)
@@ -215,8 +181,8 @@ void landisk_insl(unsigned long port, void *dst, unsigned long count)
{
u32 *buf = dst;
- if (CHECK_SH7751_PCIIO(port)) {
- volatile u32 *p = (volatile u32 *)PCI_IOMAP(port);
+ if (is_pci_ioaddr(port)) {
+ volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
while (count--)
*buf++ = *p;
@@ -232,8 +198,8 @@ void landisk_outsb(unsigned long port, const void *src, unsigned long count)
if (PXSEG(port))
while (count--)
ctrl_outb(*buf++, port);
- else if (CHECK_SH7751_PCIIO(port)) {
- volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port);
+ else if (is_pci_ioaddr(port)) {
+ volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*bp = *buf++;
@@ -251,8 +217,8 @@ void landisk_outsw(unsigned long port, const void *src, unsigned long count)
if (PXSEG(port))
p = (volatile u16 *)port;
- else if (CHECK_SH7751_PCIIO(port))
- p = (volatile u16 *)PCI_IOMAP(port);
+ else if (is_pci_ioaddr(port))
+ p = (volatile u16 *)pci_ioaddr(port);
else
p = (volatile u16 *)port2adr(port);
@@ -264,8 +230,8 @@ void landisk_outsl(unsigned long port, const void *src, unsigned long count)
{
const u32 *buf = src;
- if (CHECK_SH7751_PCIIO(port)) {
- volatile u32 *p = (volatile u32 *)PCI_IOMAP(port);
+ if (is_pci_ioaddr(port)) {
+ volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
while (count--)
*p = *buf++;
@@ -277,8 +243,8 @@ void __iomem *landisk_ioport_map(unsigned long port, unsigned int size)
{
if (PXSEG(port))
return (void __iomem *)port;
- else if (CHECK_SH7751_PCIIO(port))
- return (void __iomem *)PCI_IOMAP(port);
+ else if (is_pci_ioaddr(port))
+ return (void __iomem *)pci_ioaddr(port);
return (void __iomem *)port2adr(port);
}