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authorDavid Daney <ddaney@caviumnetworks.com>2010-02-10 15:12:45 -0800
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 12:53:25 +0100
commit9fe2e9d6f5390d7151a0b9d8c100f0da26eaa2b7 (patch)
tree1585654ec66e83e2d56c833404ac4bc7fa3ded42 /arch/mips/include
parent9b8c38917b8e083a6343bb5a0c6bbaea78ebff7a (diff)
downloadlinux-2.6.34-ux500-9fe2e9d6f5390d7151a0b9d8c100f0da26eaa2b7.tar.gz
MIPS: Add accessor functions and bit definitions for c0_PageGrain
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/950/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/mipsregs.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index edda1daf742..49382d5e891 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -251,6 +251,14 @@
#define PL_256M 28
/*
+ * PageGrain bits
+ */
+#define PG_RIE (_ULCAST_(1) << 31)
+#define PG_XIE (_ULCAST_(1) << 30)
+#define PG_ELPA (_ULCAST_(1) << 29)
+#define PG_ESP (_ULCAST_(1) << 28)
+
+/*
* R4x00 interrupt enable / cause bits
*/
#define IE_SW0 (_ULCAST_(1) << 8)
@@ -830,6 +838,9 @@ do { \
#define read_c0_pagemask() __read_32bit_c0_register($5, 0)
#define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val)
+#define read_c0_pagegrain() __read_32bit_c0_register($5, 1)
+#define write_c0_pagegrain(val) __write_32bit_c0_register($5, 1, val)
+
#define read_c0_wired() __read_32bit_c0_register($6, 0)
#define write_c0_wired(val) __write_32bit_c0_register($6, 0, val)