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authorManuel Lauss <manuel.lauss@googlemail.com>2009-10-04 14:55:25 +0200
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 12:52:50 +0100
commit95a437966dba642870a93d16bf82af8926bb2082 (patch)
tree18e797fc543f9650f03fcb06aae29bf5ca20e585 /arch/mips/include
parent9bdcf336d0c061e77f4c45c7b2bc32e3ed6b57e3 (diff)
downloadlinux-2.6.34-ux500-95a437966dba642870a93d16bf82af8926bb2082.tar.gz
MIPS: Alchemy: devboards: factor out PB1200 IRQ cascade code.
Move the PB1200 IRQ cascade code out to the BCSR support code: upcoming DB1300 support can use it too. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/mach-db1x00/bcsr.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-db1x00/bcsr.h b/arch/mips/include/asm/mach-db1x00/bcsr.h
index ecbe19e3c14..618d2de02ed 100644
--- a/arch/mips/include/asm/mach-db1x00/bcsr.h
+++ b/arch/mips/include/asm/mach-db1x00/bcsr.h
@@ -232,4 +232,7 @@ void bcsr_write(enum bcsr_id reg, unsigned short val);
/* modify a register. clear bits set in 'clr', set bits set in 'set' */
void bcsr_mod(enum bcsr_id reg, unsigned short clr, unsigned short set);
+/* install CPLD IRQ demuxer (DB1200/PB1200) */
+void __init bcsr_init_irq(int csc_start, int csc_end, int hook_irq);
+
#endif