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authorManuel Lauss <manuel.lauss@googlemail.com>2009-10-15 18:49:27 +0200
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 12:52:55 +0100
commit8402a1588a4f63465079e98481dd83d1d9cc9a98 (patch)
tree1ace3c45421fe4b8d29762fcc67bd09064197f18 /arch/mips/include/asm
parent963accbc82a0912b39de39d59e2fd6741db3aa4b (diff)
MIPS: Alchemy: prom_putchar is board dependent
This patch replaces the general alchemy prom_putchar() implementation in favor of board-specific versions: The UART where the output of prom_putchar is directed to really depends on the board, the current implementation hardcodes this on a per-SoC basis which is just wrong. So a generic uart tx function is provided in the alchemy headers, and the boards can provide their own prom_putchar with custom destination uart, and all in-kernel alchemy boards support early printk. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index c2e233997b6..e11756d9aaa 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -161,6 +161,25 @@ static inline int alchemy_get_cputype(void)
return ALCHEMY_CPU_UNKNOWN;
}
+static inline void alchemy_uart_putchar(u32 uart_phys, u8 c)
+{
+ void __iomem *base = (void __iomem *)KSEG1ADDR(uart_phys);
+ int timeout, i;
+
+ /* check LSR TX_EMPTY bit */
+ timeout = 0xffffff;
+ do {
+ if (__raw_readl(base + 0x1c) & 0x20)
+ break;
+ /* slow down */
+ for (i = 10000; i; i--)
+ asm volatile ("nop");
+ } while (--timeout);
+
+ __raw_writel(c, base + 0x04); /* tx */
+ wmb();
+}
+
/* arch/mips/au1000/common/clocks.c */
extern void set_au1x00_speed(unsigned int new_freq);
extern unsigned int get_au1x00_speed(void);