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authorHans-Christian Egtvedt <hcegtvedt@atmel.com>2007-01-31 18:01:45 +0100
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-04-27 13:43:27 +0200
commit068d9f6eb9369a00eb45be91c07653cfef65f4a0 (patch)
tree845e2162383a78c29fb05c4e8113730270b46583 /arch/avr32
parent9c8f8e752431f3f7ed6ea6ea6e491ce12057f572 (diff)
downloadlinux-2.6.34-ux500-068d9f6eb9369a00eb45be91c07653cfef65f4a0.tar.gz
[AVR32] Add nwait and tdf parameters to SMC configuration
Complete the SMC configuration code by adding nwait and tdf parameter. After this change, we support the same parameters as the hardware. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32')
-rw-r--r--arch/avr32/mach-at32ap/hsmc.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
index 7691721928a..5e22a750632 100644
--- a/arch/avr32/mach-at32ap/hsmc.c
+++ b/arch/avr32/mach-at32ap/hsmc.c
@@ -75,12 +75,35 @@ int smc_set_configuration(int cs, const struct smc_config *config)
return -EINVAL;
}
+ switch (config->nwait_mode) {
+ case 0:
+ mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED);
+ break;
+ case 1:
+ mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED);
+ break;
+ case 2:
+ mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN);
+ break;
+ case 3:
+ mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (config->tdf_cycles) {
+ mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles);
+ }
+
if (config->nrd_controlled)
mode |= HSMC_BIT(READ_MODE);
if (config->nwe_controlled)
mode |= HSMC_BIT(WRITE_MODE);
if (config->byte_write)
mode |= HSMC_BIT(BAT);
+ if (config->tdf_mode)
+ mode |= HSMC_BIT(TDF_MODE);
pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n",
cs, setup, pulse, cycle, mode);