aboutsummaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
authorhanumath <hanumath.prasad@stericsson.com>2010-03-22 16:16:19 +0530
committerJohn Rigby <john.rigby@linaro.org>2010-09-02 22:44:41 -0600
commitc7c3a428665f58b96cd752d70061ec73079d1831 (patch)
treef6dfda09f4a979f9540b2a9c7cdf811553475df6 /arch/arm
parent40fb0bd030bcf4d74439a14829f2fd11868e0134 (diff)
downloadlinux-2.6.34-ux500-c7c3a428665f58b96cd752d70061ec73079d1831.tar.gz
checkpatch_fixfor_tc35892
Signed-off-by: hanumath <hanumath.prasad@stericsson.com>
Diffstat (limited to 'arch/arm')
-rwxr-xr-xarch/arm/mach-ux500/include/mach/tc35892.h156
1 files changed, 64 insertions, 92 deletions
diff --git a/arch/arm/mach-ux500/include/mach/tc35892.h b/arch/arm/mach-ux500/include/mach/tc35892.h
index ede0ea47d32..5c222eb72ee 100755
--- a/arch/arm/mach-ux500/include/mach/tc35892.h
+++ b/arch/arm/mach-ux500/include/mach/tc35892.h
@@ -15,115 +15,91 @@
#include <linux/gpio.h>
/*System registers Index*/
-
-#define MANFACTURE_Code_Index 0x80
-#define VERSION_ID_Index 0x81
-#define IOCFG_Index 0xA7
+#define MANFACTURE_Code_Index 0x80
+#define VERSION_ID_Index 0x81
+#define IOCFG_Index 0xA7
/*clock control registers*/
-
-#define CLKMODE_Index 0x88
-#define CLKCFG_Index 0x89
-#define CLKEN_Index 0x8A
+#define CLKMODE_Index 0x88
+#define CLKCFG_Index 0x89
+#define CLKEN_Index 0x8A
/*Reset Control registers*/
-
-#define RSTCTRL_Index 0x82
-#define EXTRSTN_Index 0x83
-#define RSTINTCLR_index 0x84
-
+#define RSTCTRL_Index 0x82
+#define EXTRSTN_Index 0x83
+#define RSTINTCLR_index 0x84
#define GPIO_OFFSET
/* Interrupt registers Index*/
-
-#define GPIO_IS0_Index 0xC9
-#define GPIO_IS1_Index 0xCA
-#define GPIO_IS2_Index 0xCB
-
-#define GPIO_IBE0_Index 0xCC
-#define GPIO_IBE1_Index 0xCD
-#define GPIO_IBE2_Index 0xCE
-
-#define GPIO_IEV0_Index 0xCF
-#define GPIO_IEV1_Index 0xD0
-#define GPIO_IEV2_Index 0xD1
-
-#define GPIO_IE0_Index 0xD2
-#define GPIO_IE1_Index 0xD3
-#define GPIO_IE2_Index 0xD4
-
-#define GPIO_RIS0_Index 0xD6
-#define GPIO_RIS1_Index 0xD7
-#define GPIO_RIS2_Index 0xD8
-
-#define GPIO_MIS0_Index 0xD9
-#define GPIO_MIS1_Index 0xDA
-#define GPIO_MIS2_Index 0xDB
-
-#define GPIO_IC0_Index 0xDC
-#define GPIO_IC1_Index 0xDD
-#define GPIO_IC2_Index 0xDE
-
+#define GPIO_IS0_Index 0xC9
+#define GPIO_IS1_Index 0xCA
+#define GPIO_IS2_Index 0xCB
+#define GPIO_IBE0_Index 0xCC
+#define GPIO_IBE1_Index 0xCD
+#define GPIO_IBE2_Index 0xCE
+#define GPIO_IEV0_Index 0xCF
+#define GPIO_IEV1_Index 0xD0
+#define GPIO_IEV2_Index 0xD1
+#define GPIO_IE0_Index 0xD2
+#define GPIO_IE1_Index 0xD3
+#define GPIO_IE2_Index 0xD4
+#define GPIO_RIS0_Index 0xD6
+#define GPIO_RIS1_Index 0xD7
+#define GPIO_RIS2_Index 0xD8
+#define GPIO_MIS0_Index 0xD9
+#define GPIO_MIS1_Index 0xDA
+#define GPIO_MIS2_Index 0xDB
+#define GPIO_IC0_Index 0xDC
+#define GPIO_IC1_Index 0xDD
+#define GPIO_IC2_Index 0xDE
/*GPIO's defines*/
/*GPIO data register Index*/
-#define GPIO_DATA0_Index 0xC0
-#define GPIO_MASK0_Index 0xc1
-
-#define GPIO_DATA1_Index 0xC2
-#define GPIO_MASK1_Index 0xc3
-
-#define GPIO_DATA2_Index 0xC4
-#define GPIO_MASK2_Index 0xC5
+#define GPIO_DATA0_Index 0xC0
+#define GPIO_MASK0_Index 0xc1
+#define GPIO_DATA1_Index 0xC2
+#define GPIO_MASK1_Index 0xc3
+#define GPIO_DATA2_Index 0xC4
+#define GPIO_MASK2_Index 0xC5
/* GPIO direction register Index*/
-
-#define GPIO_DIR0_Index 0xC6
-#define GPIO_DIR1_Index 0xC7
-#define GPIO_DIR2_Index 0xC8
+#define GPIO_DIR0_Index 0xC6
+#define GPIO_DIR1_Index 0xC7
+#define GPIO_DIR2_Index 0xC8
/* GPIO Sync registers*/
-
-#define GPIO_SYNC0_Index 0xE6
-#define GPIO_SYNC1_Index 0xE7
-#define GPIO_SYNC2_Index 0xE8
+#define GPIO_SYNC0_Index 0xE6
+#define GPIO_SYNC1_Index 0xE7
+#define GPIO_SYNC2_Index 0xE8
/*GPIO Wakeup registers*/
-#define GPIO_WAKE0_Index 0xE9
-#define GPIO_WAKE1_Index 0xEA
-#define GPIO_WAKE2_Index 0xEB
+#define GPIO_WAKE0_Index 0xE9
+#define GPIO_WAKE1_Index 0xEA
+#define GPIO_WAKE2_Index 0xEB
/*GPIO OpenDrain registers*/
-#define GPIO_ODM0_Index 0xE0
-#define GPIO_ODE0_Index 0xE1
-#define GPIO_ODM1_Index 0xE2
-#define GPIO_ODE1_Index 0xE3
-#define GPIO_ODM2_Index 0xE4
-#define GPIO_ODE2_Index 0xE5
+#define GPIO_ODM0_Index 0xE0
+#define GPIO_ODE0_Index 0xE1
+#define GPIO_ODM1_Index 0xE2
+#define GPIO_ODE1_Index 0xE3
+#define GPIO_ODM2_Index 0xE4
+#define GPIO_ODE2_Index 0xE5
/*PULL UP REGISTERS*/
-#define IOPC0_Index 0xAA
-#define IOPC1_Index 0xAC
-#define IOPC2_Index 0xAE
-
-
-
-#define MAX_TC35892_GPIO 24
-
-#define MAX_INT_EXP 24
-
+#define IOPC0_Index 0xAA
+#define IOPC1_Index 0xAC
+#define IOPC2_Index 0xAE
+#define MAX_TC35892_GPIO 24
+#define MAX_INT_EXP 24
#define HIGH 1
#define LOW 0
-
-#define EDGE_SENSITIVE 0
-#define LEVEl_SENSITIVE 1
-
-#define DISABLE_INTERRUPT 0
-#define ENABLE_INTERRUPT 1
-
+#define EDGE_SENSITIVE 0
+#define LEVEl_SENSITIVE 1
+#define DISABLE_INTERRUPT 0
+#define ENABLE_INTERRUPT 1
#define TC35892_FALLING_EDGE_OR_LOWLEVEL 1
#define TC35892_RISING_EDGE_OR_HIGHLEVEL 2
-#define TC35892_BOTH_EDGE 3
+#define TC35892_BOTH_EDGE 3
typedef enum {
EGPIO_PIN_0 = 268,
@@ -151,9 +127,7 @@ typedef enum {
EGPIO_PIN_22,
EGPIO_PIN_23
} egpio_pin;
-
-typedef enum
-{
+typedef enum {
TC35892_OK = 0,
TC35892_BAD_PARAMETER = -2,
TC35892_FEAT_NOT_SUPPORTED = -3,
@@ -163,7 +137,6 @@ typedef enum
TC35892_I2C_ERROR = -7,
TC35892_ERROR = -8
} t_tc35892_error;
-
/**
* struct tc35892_platform_data - tc35892 platform dependent structure
* @gpio_base: starting number of the gpio pin
@@ -175,9 +148,8 @@ struct tc35892_platform_data {
unsigned gpio_base;
int irq;
};
-
int tc35892_remove_callback(int irq);
int tc35892_set_callback(int irq, void *handler, void *data);
-t_tc35892_error tc35892_set_intr_enable (int pin_index,unsigned char intr_enable_disable);
-t_tc35892_error tc35892_set_gpio_intr_conf (int pin_index,unsigned char edge_level_sensitive, unsigned char edge_level_type);
+t_tc35892_error tc35892_set_intr_enable (int pin_index, unsigned char intr_enable_disable);
+t_tc35892_error tc35892_set_gpio_intr_conf (int pin_index, unsigned char edge_level_sensitive, unsigned char edge_level_type);
#endif