aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRabin Vincent <rabin.vincent@stericsson.com>2010-03-09 11:06:14 +0530
committerJohn Rigby <john.rigby@linaro.org>2010-09-02 22:44:36 -0600
commitf5cc84a81b33cf70eef0f5d78c1948a8eaf46044 (patch)
treeb2977923c6f42fc1f9f6d41adc286e0139f24c4a
parentb15e9758512c67a4d66c3d53b763b48bfbb7c100 (diff)
downloadlinux-2.6.34-ux500-f5cc84a81b33cf70eef0f5d78c1948a8eaf46044.tar.gz
multiboard: cleanup U8500/U5500 support
Cleanup and reorganize cpu/board support: - complete the db8500-regs.h and db5500-regs.h headers with the respective peripheral addresses - add UX500_* macros for common peripherals and map them according to the CPU selected, and use them in common code - rename peripherals to ux500_device_* or u[85]500_device_* as appropriate - move board-specific information to mop500_devices.c - split cpu-specific code into separate cpu-db[85]500.c files - add board-u5500.c for SVP5500 (and the real U5500 boards) Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
-rw-r--r--arch/arm/mach-u8500/Makefile9
-rw-r--r--arch/arm/mach-u8500/board-u5500.c115
-rw-r--r--arch/arm/mach-u8500/clock.c9
-rw-r--r--arch/arm/mach-u8500/cpu-db5500.c47
-rw-r--r--arch/arm/mach-u8500/cpu-db8500.c79
-rw-r--r--arch/arm/mach-u8500/db5500-devices.c240
-rw-r--r--arch/arm/mach-u8500/db8500-devices.c327
-rw-r--r--arch/arm/mach-u8500/devices.c450
-rw-r--r--arch/arm/mach-u8500/gpio.c323
-rw-r--r--arch/arm/mach-u8500/include/mach/db5500-regs.h124
-rw-r--r--arch/arm/mach-u8500/include/mach/db8500-regs.h77
-rw-r--r--arch/arm/mach-u8500/include/mach/debug-macro.S7
-rw-r--r--arch/arm/mach-u8500/include/mach/devices.h41
-rw-r--r--arch/arm/mach-u8500/include/mach/hardware.h141
-rw-r--r--arch/arm/mach-u8500/include/mach/setup.h19
-rw-r--r--arch/arm/mach-u8500/include/mach/system.h2
-rw-r--r--arch/arm/mach-u8500/mcde.c4
-rw-r--r--arch/arm/mach-u8500/mop500-sdi.c8
-rw-r--r--arch/arm/mach-u8500/mop500_devices.c39
-rw-r--r--arch/arm/mach-u8500/platsmp.c12
-rw-r--r--arch/arm/mach-u8500/timer.c8
21 files changed, 1247 insertions, 834 deletions
diff --git a/arch/arm/mach-u8500/Makefile b/arch/arm/mach-u8500/Makefile
index 1feb5a1b13d..adb63af8991 100644
--- a/arch/arm/mach-u8500/Makefile
+++ b/arch/arm/mach-u8500/Makefile
@@ -3,14 +3,17 @@
#
#
-obj-y := clock.o timer.o prcmu-fw.o timer-rtt.o
+obj-y := clock.o timer.o timer-rtt.o
obj-$(CONFIG_REGULATOR) += regulator.o
-obj-$(CONFIG_ARCH_U8500) += devices.o mcde.o hsi.o gpio.o
+obj-$(CONFIG_ARCH_U8500) += devices.o
obj-$(CONFIG_STM_DMA) += dma_40.o #part1 no. of dma is 0x40
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_MACH_U8500_MOP) += mop500_devices.o mop500-sdi.o
-obj-$(CONFIG_MACH_U5500_SIMULATOR) += mop500_devices.o mop500-sdi.o
+obj-$(CONFIG_UX500_SOC_DB5500) += db5500-devices.o cpu-db5500.o
+obj-$(CONFIG_UX500_SOC_DB8500) += db8500-devices.o hsi.o mcde.o \
+ cpu-db8500.o prcmu-fw.o
obj-$(CONFIG_MACH_U8500_SIMULATOR) += mop500_devices.o mop500-sdi.o
+obj-$(CONFIG_MACH_U5500_SIMULATOR) += board-u5500.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
obj-$(CONFIG_U8500_CPUIDLE) += cpuidle.o
obj-$(CONFIG_U8500_CPUFREQ) += cpufreq.o
diff --git a/arch/arm/mach-u8500/board-u5500.c b/arch/arm/mach-u8500/board-u5500.c
new file mode 100644
index 00000000000..3dcbde07aba
--- /dev/null
+++ b/arch/arm/mach-u8500/board-u5500.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2010 ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/amba/bus.h>
+#include <linux/gpio.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <mach/i2c-stm.h>
+#include <mach/devices.h>
+#include <mach/setup.h>
+
+#ifdef CONFIG_FB_MCDE
+/*
+ * This is only for MCDE to build. Remove this once MCDE is fixed to not
+ * depend on this variable.
+ */
+int platform_id;
+#endif
+
+/*
+ * I2C
+ */
+
+static struct i2c_platform_data u8500_i2c1_data = {
+ .gpio_alt_func = GPIO_ALT_I2C_1,
+ .name = "i2c1",
+ .own_addr = I2C1_LP_OWNADDR,
+ .mode = I2C_FREQ_MODE_STANDARD,
+ .clk_freq = 100000,
+ .slave_addressing_mode = I2C_7_BIT_ADDRESS,
+ .digital_filter_control = I2C_DIGITAL_FILTERS_OFF,
+ .dma_sync_logic_control = I2C_DISABLED,
+ .start_byte_procedure = I2C_DISABLED,
+ .slave_data_setup_time = 0xE,
+ .bus_control_mode = I2C_BUS_MASTER_MODE,
+ .i2c_loopback_mode = I2C_DISABLED,
+ .xfer_mode = I2C_TRANSFER_MODE_INTERRUPT,
+ .high_speed_master_code = 0,
+ .i2c_tx_int_threshold = 1,
+ .i2c_rx_int_threshold = 1
+};
+
+static struct i2c_platform_data u8500_i2c2_data = {
+ .gpio_alt_func = GPIO_ALT_I2C_2,
+ .name = "i2c2",
+ .own_addr = I2C2_LP_OWNADDR,
+ .mode = I2C_FREQ_MODE_STANDARD,
+ .clk_freq = 100000,
+ .slave_addressing_mode = I2C_7_BIT_ADDRESS,
+ .digital_filter_control = I2C_DIGITAL_FILTERS_OFF,
+ .dma_sync_logic_control = I2C_DISABLED,
+ .start_byte_procedure = I2C_DISABLED,
+ .slave_data_setup_time = 0xE,
+ .bus_control_mode = I2C_BUS_MASTER_MODE,
+ .i2c_loopback_mode = I2C_DISABLED,
+ .xfer_mode = I2C_TRANSFER_MODE_INTERRUPT,
+ .high_speed_master_code = 0,
+ .i2c_tx_int_threshold = 1,
+ .i2c_rx_int_threshold = 1
+};
+
+static struct i2c_platform_data u8500_i2c3_data = {
+ .gpio_alt_func = GPIO_ALT_I2C_3,
+ .name = "i2c3",
+ .own_addr = I2C3_LP_OWNADDR,
+ .mode = I2C_FREQ_MODE_STANDARD,
+ .clk_freq = 100000,
+ .slave_addressing_mode = I2C_7_BIT_ADDRESS,
+ .digital_filter_control = I2C_DIGITAL_FILTERS_OFF,
+ .dma_sync_logic_control = I2C_DISABLED,
+ .start_byte_procedure = I2C_DISABLED,
+ .slave_data_setup_time = 0xE,
+ .bus_control_mode = I2C_BUS_MASTER_MODE,
+ .i2c_loopback_mode = I2C_DISABLED,
+ .xfer_mode = I2C_TRANSFER_MODE_INTERRUPT,
+ .high_speed_master_code = 0,
+ .i2c_tx_int_threshold = 1,
+ .i2c_rx_int_threshold = 1
+};
+
+static struct amba_device *amba_board_devs[] __initdata = {
+ &ux500_uart0_device,
+ &ux500_uart1_device,
+ &ux500_uart2_device,
+};
+
+static void __init u5500_init_machine(void)
+{
+ u5500_init_devices();
+
+ amba_add_devices(amba_board_devs, ARRAY_SIZE(amba_board_devs));
+
+ u8500_register_device(&ux500_i2c1_device, &u8500_i2c1_data);
+ u8500_register_device(&ux500_i2c2_device, &u8500_i2c2_data);
+ u8500_register_device(&ux500_i2c3_device, &u8500_i2c3_data);
+}
+
+MACHINE_START(NOMADIK, "ST-Ericsson U5500 Platform")
+ .phys_io = UX500_UART0_BASE,
+ .io_pg_offst = (IO_ADDRESS(UX500_UART0_BASE) >> 18) & 0xfffc,
+ .boot_params = 0x00000100,
+ .map_io = u5500_map_io,
+ .init_irq = u8500_init_irq,
+ .timer = &u8500_timer,
+ .init_machine = u5500_init_machine,
+MACHINE_END
diff --git a/arch/arm/mach-u8500/clock.c b/arch/arm/mach-u8500/clock.c
index a9f621442e1..5f84994e3ab 100644
--- a/arch/arm/mach-u8500/clock.c
+++ b/arch/arm/mach-u8500/clock.c
@@ -566,7 +566,7 @@ int __init clk_init(void)
if (cpu_is_u8500ed()) {
clk_prcmu_ops.enable = clk_prcmu_ed_enable;
clk_prcmu_ops.disable = clk_prcmu_ed_disable;
- } else {
+ } else if (cpu_is_u8500v1()) {
void __iomem *sdmmclkmgt = (void __iomem *) PRCM_SDMMCCLK_MGT;
unsigned int val;
@@ -574,6 +574,11 @@ int __init clk_init(void)
val = readl(sdmmclkmgt);
val = (val & ~0x1f) | 16;
writel(val, sdmmclkmgt);
+ } else if (cpu_is_u5500()) {
+ clk_prcmu_ops.enable = NULL;
+ clk_prcmu_ops.disable = NULL;
+ clk_prcc_ops.enable = NULL;
+ clk_prcc_ops.disable = NULL;
}
clks_register(u8500_common_clkregs, ARRAY_SIZE(u8500_common_clkregs));
@@ -583,7 +588,7 @@ int __init clk_init(void)
else
clks_register(u8500_v1_clkregs, ARRAY_SIZE(u8500_v1_clkregs));
- if (!u8500_is_earlydrop())
+ if (cpu_is_u8500() && !cpu_is_u8500ed())
u8500_amba_clk_enable();
return 0;
diff --git a/arch/arm/mach-u8500/cpu-db5500.c b/arch/arm/mach-u8500/cpu-db5500.c
new file mode 100644
index 00000000000..3c4adac835b
--- /dev/null
+++ b/arch/arm/mach-u8500/cpu-db5500.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2010 ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/amba/bus.h>
+#include <linux/io.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+#include <mach/devices.h>
+#include <mach/setup.h>
+
+static struct map_desc u5500_io_desc[] __initdata = {
+ __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),
+ __IO_DEV_DESC(U5500_GPIO1_BASE, SZ_4K),
+ __IO_DEV_DESC(U5500_GPIO2_BASE, SZ_4K),
+ __IO_DEV_DESC(U5500_GPIO3_BASE, SZ_4K),
+ __IO_DEV_DESC(U5500_GPIO4_BASE, SZ_4K),
+};
+
+static struct amba_device *u5500_amba_devs[] __initdata = {
+ &u5500_gpio0_device,
+ &u5500_gpio1_device,
+ &u5500_gpio2_device,
+ &u5500_gpio3_device,
+ &u5500_gpio4_device,
+};
+
+void __init u5500_map_io(void)
+{
+ ux500_map_io();
+
+ iotable_init(u5500_io_desc, ARRAY_SIZE(u5500_io_desc));
+}
+
+void __init u5500_init_devices(void)
+{
+ ux500_init_devices();
+
+ amba_add_devices(u5500_amba_devs, ARRAY_SIZE(u5500_amba_devs));
+}
diff --git a/arch/arm/mach-u8500/cpu-db8500.c b/arch/arm/mach-u8500/cpu-db8500.c
new file mode 100644
index 00000000000..fb7def59b22
--- /dev/null
+++ b/arch/arm/mach-u8500/cpu-db8500.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2010 ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/amba/bus.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+#include <mach/devices.h>
+#include <mach/setup.h>
+
+static struct map_desc u8500_io_desc[] __initdata = {
+ __IO_DEV_DESC(U8500_MSP0_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_MSP1_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_MSP2_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
+};
+
+static struct map_desc u8500_ed_io_desc[] __initdata = {
+ __IO_DEV_DESC(U8500_CLKRST7_BASE, SZ_4K),
+ __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K),
+ __IO_DEV_DESC(U8500_MTU1_BASE_ED, SZ_4K),
+};
+
+static struct amba_device *u8500_amba_devs[] __initdata = {
+ &u8500_gpio0_device,
+ &u8500_gpio1_device,
+ &u8500_gpio2_device,
+ &u8500_gpio3_device,
+};
+
+void __init u8500_map_io(void)
+{
+ ux500_map_io();
+
+ iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
+ if (cpu_is_u8500ed())
+ iotable_init(u8500_ed_io_desc, ARRAY_SIZE(u8500_ed_io_desc));
+}
+
+static void __init u8500_earlydrop_fixup(void)
+{
+ ux500_dma_device.resource[0].start = U8500_DMA_BASE_ED;
+ ux500_dma_device.resource[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
+ u8500_shrm_device.resource[1].start = IRQ_CA_WAKE_REQ_ED;
+ u8500_shrm_device.resource[1].end = IRQ_CA_WAKE_REQ_ED;
+ u8500_shrm_device.resource[2].start = IRQ_AC_READ_NOTIFICATION_0_ED;
+ u8500_shrm_device.resource[2].end = IRQ_AC_READ_NOTIFICATION_0_ED;
+ u8500_shrm_device.resource[3].start = IRQ_AC_READ_NOTIFICATION_1_ED;
+ u8500_shrm_device.resource[3].end = IRQ_AC_READ_NOTIFICATION_1_ED;
+ u8500_shrm_device.resource[4].start = IRQ_CA_MSG_PEND_NOTIFICATION_0_ED;
+ u8500_shrm_device.resource[4].end = IRQ_CA_MSG_PEND_NOTIFICATION_0_ED;
+ u8500_shrm_device.resource[5].start = IRQ_CA_MSG_PEND_NOTIFICATION_1_ED;
+ u8500_shrm_device.resource[5].end = IRQ_CA_MSG_PEND_NOTIFICATION_1_ED;
+}
+
+void __init u8500_init_devices(void)
+{
+ if (u8500_is_earlydrop())
+ u8500_earlydrop_fixup();
+
+ ux500_init_devices();
+
+ amba_add_devices(u8500_amba_devs, ARRAY_SIZE(u8500_amba_devs));
+}
diff --git a/arch/arm/mach-u8500/db5500-devices.c b/arch/arm/mach-u8500/db5500-devices.c
new file mode 100644
index 00000000000..8ba9fb86cb4
--- /dev/null
+++ b/arch/arm/mach-u8500/db5500-devices.c
@@ -0,0 +1,240 @@
+/*
+ * Copyright (C) 2010 ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/amba/bus.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+/* gpio alternate funtions on this platform */
+#define __GPIO_ALT(_fun, _start, _end, _cont, _type, _name) { \
+ .altfun = _fun, \
+ .start = _start, \
+ .end = _end, \
+ .cont = _cont, \
+ .type = _type, \
+ .dev_name = _name }
+
+static struct gpio_altfun_data gpio_altfun_table[] = {
+ __GPIO_ALT(GPIO_ALT_I2C_4, 4, 5, 0, GPIO_ALTF_B, "i2c4"),
+ __GPIO_ALT(GPIO_ALT_I2C_1, 16, 17, 0, GPIO_ALTF_B, "i2c1"),
+ __GPIO_ALT(GPIO_ALT_I2C_2, 8, 9, 0, GPIO_ALTF_B, "i2c2"),
+ __GPIO_ALT(GPIO_ALT_I2C_0, 147, 148, 0, GPIO_ALTF_A, "i2c0"),
+ __GPIO_ALT(GPIO_ALT_I2C_3, 229, 230, 0, GPIO_ALTF_C, "i2c3"),
+ __GPIO_ALT(GPIO_ALT_UART_2, 177, 180, 0, GPIO_ALTF_A, "uart2"),
+ __GPIO_ALT(GPIO_ALT_SSP_0, 143, 146, 0, GPIO_ALTF_A, "ssp0"),
+ __GPIO_ALT(GPIO_ALT_SSP_1, 139, 142, 0, GPIO_ALTF_A, "ssp1"),
+ __GPIO_ALT(GPIO_ALT_USB_OTG, 256, 267, 0, GPIO_ALTF_A, "usb"),
+ __GPIO_ALT(GPIO_ALT_UART_1, 200, 203, 0, GPIO_ALTF_A, "uart1"),
+ __GPIO_ALT(GPIO_ALT_UART_0_NO_MODEM, 28, 29, 0, GPIO_ALTF_A, "uart0"),
+ __GPIO_ALT(GPIO_ALT_MSP_0, 12, 15, 0, GPIO_ALTF_A, "msp0"),
+ __GPIO_ALT(GPIO_ALT_MSP_1, 33, 36, 0, GPIO_ALTF_A, "msp1"),
+ __GPIO_ALT(GPIO_ALT_MSP_2, 192, 196, 0, GPIO_ALTF_A, "msp2"),
+ __GPIO_ALT(GPIO_ALT_HSIR, 219, 221, 0, GPIO_ALTF_A, "hsir"),
+ __GPIO_ALT(GPIO_ALT_HSIT, 222, 224, 0, GPIO_ALTF_A, "hsit"),
+ __GPIO_ALT(GPIO_ALT_EMMC, 197, 207, 0, GPIO_ALTF_A, "emmc"),
+ __GPIO_ALT(GPIO_ALT_SDMMC, 18, 28, 0, GPIO_ALTF_A, "sdmmc"),
+ __GPIO_ALT(GPIO_ALT_SDIO, 208, 214, 0, GPIO_ALTF_A, "sdio"),
+ __GPIO_ALT(GPIO_ALT_TRACE, 70, 74, 0, GPIO_ALTF_C, "stm"),
+ __GPIO_ALT(GPIO_ALT_SDMMC2, 128, 138, 0, GPIO_ALTF_A, "mmc2"),
+#ifndef CONFIG_FB_NOMADIK_MCDE_CHANNELB_DISPLAY_VUIB_WVGA
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB_ED, 78, 85, 1, GPIO_ALTF_A, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB_ED, 150, 150, 0, GPIO_ALTF_B, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB, 78, 81, 1, GPIO_ALTF_A, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB, 150, 150, 0, GPIO_ALTF_B, "mcde tvout"),
+#else
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB, 153, 171, 1, GPIO_ALTF_B, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB, 64, 77, 0, GPIO_ALTF_A, "mcde tvout"),
+#endif
+ __GPIO_ALT(GPIO_ALT_LCD_PANELA, 68, 68, 0, GPIO_ALTF_A, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_MMIO_INIT_BOARD, 141, 142, 0, GPIO_ALTF_B, "mmio"),
+ __GPIO_ALT(GPIO_ALT_MMIO_CAM_SET_I2C, 8, 9, 0, GPIO_ALTF_A, "mmio"),
+ __GPIO_ALT(GPIO_ALT_MMIO_CAM_SET_EXT_CLK, 227, 228, 0, GPIO_ALTF_A, "mmio"),
+#ifdef CONFIG_TOUCHP_EXT_CLK
+ __GPIO_ALT(GPIO_ALT_TP_SET_EXT_CLK, 228, 228, 0, GPIO_ALTF_A, "u8500_tp1"),
+#endif
+};
+
+static struct gpio_block_data gpio0_block_data[] = {
+ {
+ .irq = IRQ_GPIO0,
+ .base_offset = 0x0,
+ .blocks_per_irq = 1,
+ .block_base = 0,
+ .block_size = 32,
+ },
+ {
+ .irq = IRQ_GPIO1,
+ .base_offset = 0x080,
+ .blocks_per_irq = 1,
+ .block_base = 32,
+ .block_size = 4,
+ },
+};
+
+static struct gpio_platform_data gpio0_platform_data = {
+ .gpio_data = gpio0_block_data,
+ .gpio_block_size = ARRAY_SIZE(gpio0_block_data),
+ .altfun_table = gpio_altfun_table,
+ .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
+};
+
+struct amba_device u5500_gpio0_device = {
+ .dev = {
+ .bus_id = "gpioblock0",
+ .platform_data = &gpio0_platform_data,
+ },
+ .res = {
+ .start = U5500_GPIO0_BASE,
+ .end = U5500_GPIO0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .periphid = GPIO_PER_ID,
+ .irq = {IRQ_GPIO0, NO_IRQ},
+};
+
+static struct gpio_block_data gpio1_block_data[] = {
+ {
+ .irq = IRQ_GPIO2,
+ .base_offset = 0x0,
+ .blocks_per_irq = 1,
+ .block_base = 64,
+ .block_size = 19,
+ }
+};
+
+static struct gpio_platform_data gpio1_platform_data = {
+ .gpio_data = gpio1_block_data,
+ .gpio_block_size = ARRAY_SIZE(gpio1_block_data),
+ .altfun_table = gpio_altfun_table,
+ .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
+
+};
+
+struct amba_device u5500_gpio1_device = {
+ .dev = {
+ .bus_id = "gpioblock1",
+ .platform_data = &gpio1_platform_data,
+ },
+ .res = {
+ .start = U5500_GPIO1_BASE,
+ .end = U5500_GPIO1_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .periphid = GPIO_PER_ID,
+ .irq = {IRQ_GPIO2, NO_IRQ},
+};
+
+static struct gpio_block_data gpio2_block_data[] = {
+ {
+ .irq = IRQ_GPIO3,
+ .base_offset = 0x0,
+ .blocks_per_irq = 1,
+ .block_base = 96,
+ .block_size = 6,
+ }
+};
+
+static struct gpio_platform_data gpio2_platform_data = {
+ .gpio_data = gpio2_block_data,
+ .gpio_block_size = ARRAY_SIZE(gpio2_block_data),
+ .altfun_table = gpio_altfun_table,
+ .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
+};
+
+struct amba_device u5500_gpio2_device = {
+ .dev = {
+ .bus_id = "gpioblock2",
+ .platform_data = &gpio2_platform_data,
+ },
+ .res = {
+ .start = U5500_GPIO2_BASE,
+ .end = U5500_GPIO2_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .periphid = GPIO_PER_ID,
+ .irq = {IRQ_GPIO3, NO_IRQ},
+};
+
+static struct gpio_block_data gpio3_block_data[] = {
+ {
+ .irq = IRQ_GPIO4,
+ .base_offset = 0x0,
+ .blocks_per_irq = 1,
+ .block_base = 128,
+ .block_size = 21,
+ }
+};
+
+static struct gpio_platform_data gpio3_platform_data = {
+ .gpio_data = gpio3_block_data,
+ .gpio_block_size = ARRAY_SIZE(gpio3_block_data),
+ .altfun_table = gpio_altfun_table,
+ .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
+
+};
+
+struct amba_device u5500_gpio3_device = {
+ .dev = {
+ .bus_id = "gpioblock3",
+ .platform_data = &gpio3_platform_data,
+ },
+ .res = {
+ .start = U5500_GPIO3_BASE,
+ .end = U5500_GPIO3_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .periphid = GPIO_PER_ID,
+ .irq = {IRQ_GPIO4, NO_IRQ},
+};
+
+static struct gpio_block_data gpio4_block_data[] = {
+ {
+ .irq = IRQ_GPIO5,
+ .base_offset = 0x0,
+ .blocks_per_irq = 1,
+ .block_base = 160,
+ .block_size = 32,
+ },
+ {
+ .irq = IRQ_GPIO6,
+ .base_offset = 0x80,
+ .blocks_per_irq = 1,
+ .block_base = 192,
+ .block_size = 32,
+ },
+ {
+ .irq = IRQ_GPIO7,
+ .base_offset = 0x100,
+ .blocks_per_irq = 1,
+ .block_base = 224,
+ .block_size = 4,
+ }
+};
+static struct gpio_platform_data gpio4_platform_data = {
+ .gpio_data = gpio4_block_data,
+ .gpio_block_size = ARRAY_SIZE(gpio4_block_data),
+ .altfun_table = gpio_altfun_table,
+ .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
+
+};
+struct amba_device u5500_gpio4_device = {
+ .dev = {
+ .bus_id = "gpioblock4",
+ .platform_data = &gpio4_platform_data,
+ },
+ .res = {
+ .start = U5500_GPIO4_BASE,
+ .end = U5500_GPIO4_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .periphid = GPIO_PER_ID,
+ .irq = {IRQ_GPIO5, NO_IRQ},
+};
diff --git a/arch/arm/mach-u8500/db8500-devices.c b/arch/arm/mach-u8500/db8500-devices.c
new file mode 100644
index 00000000000..4bba6684bbb
--- /dev/null
+++ b/arch/arm/mach-u8500/db8500-devices.c
@@ -0,0 +1,327 @@
+/*
+ * Copyright (C) 2010 ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/amba/bus.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+#include <linux/spi/spi.h>
+
+#include <mach/dma.h>
+#include <linux/spi/spi-stm.h>
+
+/* gpio alternate funtions on this platform */
+#define __GPIO_ALT(_fun, _start, _end, _cont, _type, _name) { \
+ .altfun = _fun, \
+ .start = _start, \
+ .end = _end, \
+ .cont = _cont, \
+ .type = _type, \
+ .dev_name = _name }
+
+static struct gpio_altfun_data gpio_altfun_table[] = {
+ __GPIO_ALT(GPIO_ALT_I2C_4, 4, 5, 0, GPIO_ALTF_B, "i2c4"),
+ __GPIO_ALT(GPIO_ALT_I2C_1, 16, 17, 0, GPIO_ALTF_B, "i2c1"),
+ __GPIO_ALT(GPIO_ALT_I2C_2, 8, 9, 0, GPIO_ALTF_B, "i2c2"),
+ __GPIO_ALT(GPIO_ALT_I2C_0, 147, 148, 0, GPIO_ALTF_A, "i2c0"),
+ __GPIO_ALT(GPIO_ALT_I2C_3, 229, 230, 0, GPIO_ALTF_C, "i2c3"),
+ __GPIO_ALT(GPIO_ALT_UART_2, 29, 32, 0, GPIO_ALTF_C, "uart2"),
+ __GPIO_ALT(GPIO_ALT_SSP_0, 143, 146, 0, GPIO_ALTF_A, "ssp0"),
+ __GPIO_ALT(GPIO_ALT_SSP_1, 139, 142, 0, GPIO_ALTF_A, "ssp1"),
+ __GPIO_ALT(GPIO_ALT_USB_OTG, 256, 267, 0, GPIO_ALTF_A, "usb"),
+ __GPIO_ALT(GPIO_ALT_UART_1, 4, 7, 0, GPIO_ALTF_A, "uart1"),
+ __GPIO_ALT(GPIO_ALT_UART_0_NO_MODEM, 0, 3, 0, GPIO_ALTF_A, "uart0"),
+ __GPIO_ALT(GPIO_ALT_UART_0_MODEM, 0, 3, 1, GPIO_ALTF_A, "uart0"),
+ __GPIO_ALT(GPIO_ALT_UART_0_MODEM, 33, 36, 0, GPIO_ALTF_C, "uart0"),
+ __GPIO_ALT(GPIO_ALT_MSP_0, 12, 15, 0, GPIO_ALTF_A, "msp0"),
+ __GPIO_ALT(GPIO_ALT_MSP_1, 33, 36, 0, GPIO_ALTF_A, "msp1"),
+ __GPIO_ALT(GPIO_ALT_MSP_2, 192, 196, 0, GPIO_ALTF_A, "msp2"),
+ __GPIO_ALT(GPIO_ALT_HSIR, 219, 221, 0, GPIO_ALTF_A, "hsir"),
+ __GPIO_ALT(GPIO_ALT_HSIT, 222, 224, 0, GPIO_ALTF_A, "hsit"),
+ __GPIO_ALT(GPIO_ALT_EMMC, 197, 207, 0, GPIO_ALTF_A, "emmc"),
+ __GPIO_ALT(GPIO_ALT_SDMMC, 18, 28, 0, GPIO_ALTF_A, "sdmmc"),
+ __GPIO_ALT(GPIO_ALT_SDIO, 208, 214, 0, GPIO_ALTF_A, "sdio"),
+ __GPIO_ALT(GPIO_ALT_TRACE, 70, 74, 0, GPIO_ALTF_C, "stm"),
+ __GPIO_ALT(GPIO_ALT_SDMMC2, 128, 138, 0, GPIO_ALTF_A, "mmc2"),
+#ifndef CONFIG_FB_NOMADIK_MCDE_CHANNELB_DISPLAY_VUIB_WVGA
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB_ED, 78, 85, 1, GPIO_ALTF_A, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB_ED, 150, 150, 0, GPIO_ALTF_B, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB, 78, 81, 1, GPIO_ALTF_A, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB, 150, 150, 0, GPIO_ALTF_B, "mcde tvout"),
+#else
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB, 153, 171, 1, GPIO_ALTF_B, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_LCD_PANELB, 64, 77, 0, GPIO_ALTF_A, "mcde tvout"),
+#endif
+ __GPIO_ALT(GPIO_ALT_LCD_PANELA, 68, 68, 0, GPIO_ALTF_A, "mcde tvout"),
+ __GPIO_ALT(GPIO_ALT_MMIO_INIT_BOARD, 141, 142, 0, GPIO_ALTF_B, "mmio"),
+ __GPIO_ALT(GPIO_ALT_MMIO_CAM_SET_I2C, 8, 9, 0, GPIO_ALTF_A, "mmio"),
+ __GPIO_ALT(GPIO_ALT_MMIO_CAM_SET_EXT_CLK, 227, 228, 0, GPIO_ALTF_A, "mmio"),
+#ifdef CONFIG_TOUCHP_EXT_CLK
+ __GPIO_ALT(GPIO_ALT_TP_SET_EXT_CLK, 228, 228, 0, GPIO_ALTF_A, "u8500_tp1"),
+#endif
+};
+
+static struct gpio_block_data gpio0_block_data[] = {
+ {
+ .irq = IRQ_GPIO0,
+ .base_offset = 0x0,
+ .blocks_per_irq = 1,
+ .block_base = 0,
+ .block_size = 32,
+ },
+ {
+ .irq = IRQ_GPIO1,
+ .base_offset = 0x080,
+ .blocks_per_irq = 1,
+ .block_base = 32,
+ .block_size = 5,
+ }
+};
+
+static struct gpio_platform_data gpio0_platform_data = {
+ .gpio_data = gpio0_block_data,
+ .gpio_block_size = ARRAY_SIZE(gpio0_block_data),
+ .altfun_table = gpio_altfun_table,
+ .altfun_table_size = ARRAY_SIZE(gpio_altfun_table),
+};
+
+struct amba_device u8500_gpio0_device = {
+ .dev = {
+ .bus_id = "gpioblock0",
+ .platform_data = &gpio0_platform_data,
+ },
+ .res = {
+ .start = U8500_GPIO0_BASE,
+ .end = U8500_GPIO0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .periphid = GPIO_PER_ID,
+ .irq = {IRQ_GPIO0, NO_IRQ},
+};
+
+static struct gpio_block_data gpio1_block_data[] = {
+ {
+ .irq = IRQ_GPIO2,
+ .base_offset = 0x0,
+ .blocks_per_irq = 1,
+ .block_base = 64,
+ .block_size = 32,
+ },
+ {
+ .irq = IRQ_GPIO3,
+ .base_offset = 0x080,
+ .blocks_per_irq = 1,
+ .block_base = 96,
+ .block_size = 2,
+ },
+ {
+ .irq = IRQ_GPIO4,
+ .base_offset = 0x100,
+ .blocks_per_irq = 1,
+ .block_base = 128,
+ .block_size = 32,
+ },
+ {
+ .irq = IRQ_GPIO5,
+ .base_offset = 0x180,
+ .blocks_per_irq = 1,
+ .block_base = 160,
+ .block_size = 12,
+ }
+};
+static struct gpio_platform_data gpio1_platform_data = {
+ .gpio_data = gpio1_block_data,
+ .gpio_block_size = ARRAY_SIZE(gpio1_block_data),
+ .altfun_table = gpio_altfun_table,
+ .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
+};
+
+struct amba_device u8500_gpio1_device = {
+ .dev = {
+ .bus_id = "gpioblock1",
+ .platform_data = &gpio1_platform_data,
+ },
+ .res = {
+ .start = U8500_GPIO1_BASE,
+ .end = U8500_GPIO1_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .periphid = GPIO_PER_ID,
+ .irq = {IRQ_GPIO2, NO_IRQ},
+};
+
+static struct gpio_block_data gpio2_block_data[] = {
+ {
+ .irq = IRQ_GPIO6,
+ .base_offset = 0x0,
+ .blocks_per_irq = 1,
+ .block_base = 192,
+ .block_size = 32,
+ },
+ {
+ .irq = IRQ_GPIO7,
+ .base_offset = 0x080,
+ .blocks_per_irq = 1,
+ .block_base = 224,
+ .block_size = 7,
+ }
+};
+
+static struct gpio_platform_data gpio2_platform_data = {
+ .gpio_data = gpio2_block_data,
+ .gpio_block_size = ARRAY_SIZE(gpio2_block_data),
+ .altfun_table = gpio_altfun_table,
+ .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
+};
+
+struct amba_device u8500_gpio2_device = {
+ .dev = {
+ .bus_id = "gpioblock2",
+ .platform_data = &gpio2_platform_data,
+ },
+ .res = {
+ .start = U8500_GPIO2_BASE,
+ .end = U8500_GPIO2_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .periphid = GPIO_PER_ID,
+ .irq = {IRQ_GPIO6, NO_IRQ},
+};
+
+static struct gpio_block_data gpio3_block_data[] = {
+ {
+ .irq = IRQ_GPIO8,
+ .base_offset = 0x0,
+ .blocks_per_irq = 1,
+ .block_base = 256,
+ .block_size = 12,
+ }
+};
+
+static struct gpio_platform_data gpio3_platform_data = {
+ .gpio_data = gpio3_block_data,
+ .gpio_block_size = ARRAY_SIZE(gpio3_block_data),
+ .altfun_table = gpio_altfun_table,
+ .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
+
+};
+
+struct amba_device u8500_gpio3_device = {
+ .dev = {
+ .bus_id = "gpioblock3",
+ .platform_data = &gpio3_platform_data,
+ },
+ .res = {
+ .start = U8500_GPIO3_BASE,
+ .end = U8500_GPIO3_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .periphid = GPIO_PER_ID,
+ .irq = {IRQ_GPIO8, NO_IRQ},
+};
+
+static struct resource u8500_i2c0_resources[] = {
+ [0] = {
+ .start = U8500_I2C0_BASE,
+ .end = U8500_I2C0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_I2C0,
+ .end = IRQ_I2C0,
+ .flags = IORESOURCE_IRQ,
+ }
+};
+
+struct platform_device u8500_i2c0_device = {
+ .name = "STM-I2C",
+ .id = 0,
+ .resource = u8500_i2c0_resources,
+ .num_resources = ARRAY_SIZE(u8500_i2c0_resources),
+};
+
+static struct resource u8500_i2c4_resources[] = {
+ [0] = {
+ .start = U8500_I2C4_BASE,
+ .end = U8500_I2C4_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_I2C4,
+ .end = IRQ_I2C4,
+ .flags = IORESOURCE_IRQ,
+ }
+};
+
+struct platform_device u8500_i2c4_device = {
+ .name = "STM-I2C",
+ .id = 4,
+ .resource = u8500_i2c4_resources,
+ .num_resources = ARRAY_SIZE(u8500_i2c4_resources),
+};
+
+#define NUM_SSP_CLIENTS 10
+
+static struct nmdk_spi_master_cntlr ssp0_platform_data = {
+ .enable_dma = 1,
+ .id = SSP_0_CONTROLLER,
+ .num_chipselect = NUM_SSP_CLIENTS,
+ .base_addr = U8500_SSP0_BASE,
+ .rx_fifo_addr = U8500_SSP0_BASE + SSP_TX_RX_REG_OFFSET,
+ .rx_fifo_dev_type = DMA_DEV_SSP0_RX,
+ .tx_fifo_addr = U8500_SSP0_BASE + SSP_TX_RX_REG_OFFSET,
+ .tx_fifo_dev_type = DMA_DEV_SSP0_TX,
+ .gpio_alt_func = GPIO_ALT_SSP_0,
+ .device_name = "ssp0",
+};
+
+struct amba_device u8500_ssp0_device = {
+ .dev = {
+ .bus_id = "ssp0",
+ .platform_data = &ssp0_platform_data,
+ },
+ .res = {
+ .start = U8500_SSP0_BASE,
+ .end = U8500_SSP0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .dma_mask = DMA_BIT_MASK(32),
+ .irq = {IRQ_SSP0, NO_IRQ},
+ .periphid = SSP_PER_ID,
+};
+
+static struct nmdk_spi_master_cntlr ssp1_platform_data = {
+ .enable_dma = 1,
+ .id = SSP_1_CONTROLLER,
+ .num_chipselect = NUM_SSP_CLIENTS,
+ .base_addr = U8500_SSP1_BASE,
+ .rx_fifo_addr = U8500_SSP1_BASE + SSP_TX_RX_REG_OFFSET,
+ .rx_fifo_dev_type = DMA_DEV_SSP1_RX,
+ .tx_fifo_addr = U8500_SSP1_BASE + SSP_TX_RX_REG_OFFSET,
+ .tx_fifo_dev_type = DMA_DEV_SSP1_TX,
+ .gpio_alt_func = GPIO_ALT_SSP_1,
+ .device_name = "ssp1",
+};
+
+struct amba_device u8500_ssp1_device = {
+ .dev = {
+ .bus_id = "ssp1",
+ .platform_data = &ssp1_platform_data,
+ },
+ .res = {
+ .start = U8500_SSP1_BASE,
+ .end = U8500_SSP1_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .dma_mask = DMA_BIT_MASK(32),
+ .irq = {IRQ_SSP1, NO_IRQ},
+ .periphid = SSP_PER_ID,
+};
diff --git a/arch/arm/mach-u8500/devices.c b/arch/arm/mach-u8500/devices.c
index 0b094293c18..fe570f779f1 100644
--- a/arch/arm/mach-u8500/devices.c
+++ b/arch/arm/mach-u8500/devices.c
@@ -18,6 +18,7 @@
#include <linux/usb/musb.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
+#include <linux/dma-mapping.h>
#include <asm/irq.h>
@@ -42,8 +43,7 @@
#include <mach/stmpe2401.h>
#include <mach/tc35892.h>
#include <mach/uart.h>
-
-extern void __init mop500_platform_init(void);
+#include <mach/setup.h>
void __init u8500_register_device(struct platform_device *dev, void *data)
{
@@ -67,6 +67,7 @@ void __init u8500_register_amba_device(struct amba_device *dev, void *data)
dev_err(&dev->dev, "unable to register device: %d\n", ret);
}
+#ifdef CONFIG_UX500_SOC_DB8500
/* MSP is being used as a platform device because the perif id of all MSPs
* is same & hence probe would be called for
* 2 drivers namely: msp-spi & msp-i2s.
@@ -178,6 +179,7 @@ struct platform_device u8500_msp2_device = {
.platform_data = &msp2_platform_data,
},
};
+#endif
#define NUM_MSP_CLIENTS 10
@@ -209,30 +211,10 @@ struct amba_device u8500_msp2_spi_device = {
.periphid = MSP_PER_ID,
};
-static struct resource u8500_i2c0_resources[] = {
- [0] = {
- .start = U8500_I2C0_BASE,
- .end = U8500_I2C0_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_I2C0,
- .end = IRQ_I2C0,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-struct platform_device u8500_i2c0_device = {
- .name = "STM-I2C",
- .id = 0,
- .resource = u8500_i2c0_resources,
- .num_resources = ARRAY_SIZE(u8500_i2c0_resources),
-};
-
-static struct resource u8500_i2c1_resources[] = {
+static struct resource ux500_i2c1_resources[] = {
[0] = {
- .start = U8500_I2C1_BASE,
- .end = U8500_I2C1_BASE + SZ_4K - 1,
+ .start = UX500_I2C1_BASE,
+ .end = UX500_I2C1_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -242,17 +224,17 @@ static struct resource u8500_i2c1_resources[] = {
}
};
-struct platform_device u8500_i2c1_device = {
+struct platform_device ux500_i2c1_device = {
.name = "STM-I2C",
.id = 1,
- .resource = u8500_i2c1_resources,
- .num_resources = ARRAY_SIZE(u8500_i2c1_resources),
+ .resource = ux500_i2c1_resources,
+ .num_resources = ARRAY_SIZE(ux500_i2c1_resources),
};
-static struct resource u8500_i2c2_resources[] = {
+static struct resource ux500_i2c2_resources[] = {
[0] = {
- .start = U8500_I2C2_BASE,
- .end = U8500_I2C2_BASE + SZ_4K - 1,
+ .start = UX500_I2C2_BASE,
+ .end = UX500_I2C2_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -262,17 +244,17 @@ static struct resource u8500_i2c2_resources[] = {
}
};
-struct platform_device u8500_i2c2_device = {
+struct platform_device ux500_i2c2_device = {
.name = "STM-I2C",
.id = 2,
- .resource = u8500_i2c2_resources,
- .num_resources = ARRAY_SIZE(u8500_i2c2_resources),
+ .resource = ux500_i2c2_resources,
+ .num_resources = ARRAY_SIZE(ux500_i2c2_resources),
};
-static struct resource u8500_i2c3_resources[] = {
+static struct resource ux500_i2c3_resources[] = {
[0] = {
- .start = U8500_I2C3_BASE,
- .end = U8500_I2C3_BASE + SZ_4K - 1,
+ .start = UX500_I2C3_BASE,
+ .end = UX500_I2C3_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -282,31 +264,11 @@ static struct resource u8500_i2c3_resources[] = {
}
};
-struct platform_device u8500_i2c3_device = {
+struct platform_device ux500_i2c3_device = {
.name = "STM-I2C",
.id = 3,
- .resource = u8500_i2c3_resources,
- .num_resources = ARRAY_SIZE(u8500_i2c3_resources),
-};
-
-static struct resource u8500_i2c4_resources[] = {
- [0] = {
- .start = U8500_I2C4_BASE,
- .end = U8500_I2C4_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_I2C4,
- .end = IRQ_I2C4,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-struct platform_device u8500_i2c4_device = {
- .name = "STM-I2C",
- .id = 4,
- .resource = u8500_i2c4_resources,
- .num_resources = ARRAY_SIZE(u8500_i2c4_resources),
+ .resource = ux500_i2c3_resources,
+ .num_resources = ARRAY_SIZE(ux500_i2c3_resources),
};
static struct shrm_plat_data shrm_platform_data = {
@@ -368,29 +330,28 @@ struct platform_device u8500_shrm_device = {
static struct resource b2r2_resources[] = {
[0] = {
- .start = U8500_B2R2_BASE,
- .end = U8500_B2R2_BASE + ((4*1024)-1),
- .name = "b2r2_base",
- .flags = IORESOURCE_MEM,
+ .start = UX500_B2R2_BASE,
+ .end = UX500_B2R2_BASE + ((4*1024)-1),
+ .name = "b2r2_base",
+ .flags = IORESOURCE_MEM,
},
[1] = {
- .start = PRCM_B2R2CLK_MGT_REG,
- .end = PRCM_B2R2CLK_MGT_REG + (sizeof(u32) - 1),
- .name = "prcm_b2r2_clk",
- .flags = IORESOURCE_MEM,
+ .start = PRCM_B2R2CLK_MGT_REG,
+ .end = PRCM_B2R2CLK_MGT_REG + (sizeof(u32) - 1),
+ .name = "prcm_b2r2_clk",
+ .flags = IORESOURCE_MEM,
},
};
-struct platform_device u8500_b2r2_device = {
- .name = "U8500-B2R2",
- .id = 0,
- .dev = {
+struct platform_device ux500_b2r2_device = {
+ .name = "U8500-B2R2",
+ .id = 0,
+ .dev = {
.bus_id = "b2r2_bus",
.coherent_dma_mask = ~0,
},
-
- .num_resources = ARRAY_SIZE(b2r2_resources),
- .resource = b2r2_resources
+ .num_resources = ARRAY_SIZE(b2r2_resources),
+ .resource = b2r2_resources,
};
static void __init early_pmem_generic_parse(char **p, struct android_pmem_platform_data * data)
@@ -478,224 +439,158 @@ struct platform_device u8500_pmem_hwb_device = {
},
};
-struct amba_device u8500_rtc_device = {
- .dev = {
+struct amba_device ux500_rtc_device = {
+ .dev = {
.bus_id = "mb:15",
},
- .res = {
- .start = U8500_RTC_BASE,
- .end = U8500_RTC_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
+ .res = {
+ .start = UX500_RTC_BASE,
+ .end = UX500_RTC_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
},
- .irq = {IRQ_RTC_RTT, NO_IRQ},
- .periphid = RTC_PER_ID,
+ .irq = {IRQ_RTC_RTT, NO_IRQ},
+ .periphid = RTC_PER_ID,
};
#include "clock.h"
-#define __IO_DEV_DESC(x, sz) { \
- .virtual = IO_ADDRESS(x), \
- .pfn = __phys_to_pfn(x), \
- .length = sz, \
- .type = MT_DEVICE, \
-}
-
-static struct map_desc u8500_common_io_desc[] __initdata = {
+static struct map_desc ux500_io_desc[] __initdata = {
__IO_DEV_DESC(U8500_RTC_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
+
__IO_DEV_DESC(U8500_MSP0_BASE, SZ_4K),
__IO_DEV_DESC(U8500_MSP1_BASE, SZ_4K),
__IO_DEV_DESC(U8500_MSP2_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_UART1_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_GPIO_BASE, SZ_4K),
- __IO_DEV_DESC(GPIO_BANK0_BASE, SZ_4K),
- __IO_DEV_DESC(GPIO_BANK1_BASE, SZ_4K),
- __IO_DEV_DESC(GPIO_BANK2_BASE, SZ_4K),
- __IO_DEV_DESC(GPIO_BANK3_BASE, SZ_4K),
- __IO_DEV_DESC(GPIO_BANK4_BASE, SZ_4K),
- __IO_DEV_DESC(GPIO_BANK5_BASE, SZ_4K),
- __IO_DEV_DESC(GPIO_BANK6_BASE, SZ_4K),
- __IO_DEV_DESC(GPIO_BANK7_BASE, SZ_4K),
- __IO_DEV_DESC(GPIO_BANK8_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_CLKRST7_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
- __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
- __IO_DEV_DESC(U8500_B2R2_BASE, SZ_4K),
-};
-
-static struct map_desc u8500_ed_io_desc[] __initdata = {
- __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K),
- __IO_DEV_DESC(U8500_MTU1_BASE_ED, SZ_4K),
-};
-
-static struct map_desc u8500_v1_io_desc[] __initdata = {
- __IO_DEV_DESC(U8500_MTU0_BASE_V1, SZ_4K),
- __IO_DEV_DESC(U8500_MTU1_BASE_V1, SZ_4K),
-};
-
-static struct resource u8500_dma_resources[] = {
- [0] = {
- .start = U8500_DMA_BASE_V1,
- .end = U8500_DMA_BASE_V1 + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_DMA,
- .end = IRQ_DMA,
- .flags = IORESOURCE_IRQ}
+
+ __IO_DEV_DESC(UX500_UART0_BASE, SZ_4K),
+ __IO_DEV_DESC(UX500_UART1_BASE, SZ_4K),
+ __IO_DEV_DESC(UX500_UART2_BASE, SZ_4K),
+
+ __IO_DEV_DESC(UX500_GIC_CPU_BASE, SZ_4K),
+ __IO_DEV_DESC(UX500_GIC_DIST_BASE, SZ_4K),
+ __IO_DEV_DESC(UX500_L2CC_BASE, SZ_4K),
+
+ __IO_DEV_DESC(UX500_CLKRST1_BASE, SZ_4K),
+ __IO_DEV_DESC(UX500_CLKRST2_BASE, SZ_4K),
+ __IO_DEV_DESC(UX500_CLKRST3_BASE, SZ_4K),
+ __IO_DEV_DESC(UX500_CLKRST5_BASE, SZ_4K),
+ __IO_DEV_DESC(UX500_CLKRST6_BASE, SZ_4K),
+
+ __IO_DEV_DESC(UX500_MTU0_BASE, SZ_4K),
+ __IO_DEV_DESC(UX500_MTU1_BASE, SZ_4K),
+
+ __IO_DEV_DESC(UX500_BACKUPRAM0_BASE, SZ_8K),
};
-struct platform_device u8500_dma_device = {
- .name = "STM-DMA",
- .id = 0,
- .num_resources = 2,
- .resource = u8500_dma_resources
+static struct platform_device *ux500_platform_devs[] __initdata = {
+ &ux500_dma_device,
};
-#define NUM_SSP_CLIENTS 10
+static struct amba_device *ux500_amba_devs[] __initdata = {
+ &ux500_rtc_device,
+};
-static struct nmdk_spi_master_cntlr ssp0_platform_data = {
- .enable_dma = 1,
- .id = SSP_0_CONTROLLER,
- .num_chipselect = NUM_SSP_CLIENTS,
- .base_addr = U8500_SSP0_BASE,
- .rx_fifo_addr = U8500_SSP0_BASE + SSP_TX_RX_REG_OFFSET,
- .rx_fifo_dev_type = DMA_DEV_SSP0_RX,
- .tx_fifo_addr = U8500_SSP0_BASE + SSP_TX_RX_REG_OFFSET,
- .tx_fifo_dev_type = DMA_DEV_SSP0_TX,
- .gpio_alt_func = GPIO_ALT_SSP_0,
- .device_name = "ssp0",
-};
-
-struct amba_device u8500_ssp0_device = {
- .dev = {
- .bus_id = "ssp0",
- .platform_data = &ssp0_platform_data,
- },
- .res = {
- .start = U8500_SSP0_BASE,
- .end = U8500_SSP0_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- .dma_mask = ~0,
- .irq = {IRQ_SSP0, NO_IRQ},
- .periphid = SSP_PER_ID,
+void __init ux500_init_devices(void)
+{
+ platform_add_devices(ux500_platform_devs,
+ ARRAY_SIZE(ux500_platform_devs));
+ amba_add_devices(ux500_amba_devs, ARRAY_SIZE(ux500_amba_devs));
+}
+
+static struct resource ux500_dma_resources[] = {
+ [0] = {
+ .start = UX500_DMA_BASE,
+ .end = UX500_DMA_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_DMA,
+ .end = IRQ_DMA,
+ .flags = IORESOURCE_IRQ
+ },
};
-static struct nmdk_spi_master_cntlr ssp1_platform_data = {
- .enable_dma = 1,
- .id = SSP_1_CONTROLLER,
- .num_chipselect = NUM_SSP_CLIENTS,
- .base_addr = U8500_SSP1_BASE,
- .rx_fifo_addr = U8500_SSP1_BASE + SSP_TX_RX_REG_OFFSET,
- .rx_fifo_dev_type = DMA_DEV_SSP1_RX,
- .tx_fifo_addr = U8500_SSP1_BASE + SSP_TX_RX_REG_OFFSET,
- .tx_fifo_dev_type = DMA_DEV_SSP1_TX,
- .gpio_alt_func = GPIO_ALT_SSP_1,
- .device_name = "ssp1",
-};
-
-struct amba_device u8500_ssp1_device = {
- .dev = {
- .bus_id = "ssp1",
- .platform_data = &ssp1_platform_data,
- },
- .res = {
- .start = U8500_SSP1_BASE,
- .end = U8500_SSP1_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- .dma_mask = ~0,
- .irq = {IRQ_SSP1, NO_IRQ},
- .periphid = SSP_PER_ID,
+struct platform_device ux500_dma_device = {
+ .name = "STM-DMA",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(ux500_dma_resources),
+ .resource = ux500_dma_resources
};
#define NUM_SPI023_CLIENTS 10
static struct nmdk_spi_master_cntlr spi0_platform_data = {
- .enable_dma = 1,
- .id = SPI023_0_CONTROLLER,
- .num_chipselect = NUM_SPI023_CLIENTS,
- .base_addr = U8500_SPI0_BASE,
- .rx_fifo_addr = U8500_SPI0_BASE + SPI_TX_RX_REG_OFFSET,
- .rx_fifo_dev_type = DMA_DEV_SPI0_RX,
- .tx_fifo_addr = U8500_SPI0_BASE + SPI_TX_RX_REG_OFFSET,
- .tx_fifo_dev_type = DMA_DEV_SPI0_TX,
- .gpio_alt_func = GPIO_ALT_SSP_0,
- /*FIXME: using SSP for time being just for compilation */
- .device_name = "spi0",
-};
-
-struct amba_device u8500_spi0_device = {
- .dev = {
- .bus_id = "spi0",
+ .enable_dma = 1,
+ .id = SPI023_0_CONTROLLER,
+ .num_chipselect = NUM_SPI023_CLIENTS,
+ .base_addr = UX500_SPI0_BASE,
+ .rx_fifo_addr = UX500_SPI0_BASE + SPI_TX_RX_REG_OFFSET,
+ .rx_fifo_dev_type = DMA_DEV_SPI0_RX,
+ .tx_fifo_addr = UX500_SPI0_BASE + SPI_TX_RX_REG_OFFSET,
+ .tx_fifo_dev_type = DMA_DEV_SPI0_TX,
+ .gpio_alt_func = GPIO_ALT_SSP_0,
+ .device_name = "spi0",
+};
+
+struct amba_device ux500_spi0_device = {
+ .dev = {
+ .bus_id = "spi0",
.platform_data = &spi0_platform_data,
- },
- .res = {
- .start = U8500_SPI0_BASE,
- .end = U8500_SPI0_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- .dma_mask = ~0,
- .irq = {IRQ_SPI0, NO_IRQ},
- .periphid = SPI_PER_ID,
+ },
+ .res = {
+ .start = UX500_SPI0_BASE,
+ .end = UX500_SPI0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .dma_mask = DMA_BIT_MASK(32),
+ .irq = {IRQ_SPI0, NO_IRQ},
+ .periphid = SPI_PER_ID,
};
-struct amba_device u8500_sdi0_device = {
+struct amba_device ux500_sdi0_device = {
.dev = {
.init_name = "sdi0",
},
.res = {
- .start = U8500_SDI0_BASE,
- .end = U8500_SDI0_BASE + SZ_4K - 1,
+ .start = UX500_SDI0_BASE,
+ .end = UX500_SDI0_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_SDMMC0, NO_IRQ},
.periphid = SDI_PER_ID,
};
-struct amba_device u8500_sdi1_device = {
+struct amba_device ux500_sdi1_device = {
.dev = {
.init_name = "sdi1",
},
.res = {
- .start = U8500_SDI1_BASE,
- .end = U8500_SDI1_BASE + SZ_4K - 1,
+ .start = UX500_SDI1_BASE,
+ .end = UX500_SDI1_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_SDMMC1, NO_IRQ},
.periphid = SDI_PER_ID,
};
-struct amba_device u8500_sdi2_device = {
+struct amba_device ux500_sdi2_device = {
.dev = {
.init_name = "sdi2",
},
.res = {
- .start = U8500_SDI2_BASE,
- .end = U8500_SDI2_BASE + SZ_4K - 1,
+ .start = UX500_SDI2_BASE,
+ .end = UX500_SDI2_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_SDMMC2, NO_IRQ},
.periphid = SDI_PER_ID,
};
-struct amba_device u8500_sdi4_device = {
+struct amba_device ux500_sdi4_device = {
.dev = {
.init_name = "sdi4",
},
.res = {
- .start = U8500_SDI4_BASE,
- .end = U8500_SDI4_BASE + SZ_4K - 1,
+ .start = UX500_SDI4_BASE,
+ .end = UX500_SDI4_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_SDMMC4, NO_IRQ},
@@ -767,8 +662,8 @@ static struct musb_hdrc_platform_data musb_hdrc_hs_otg_platform_data = {
static struct resource usb_resources[] = {
[0] = {
.name = "usb-mem",
- .start = U8500_USBOTG_BASE,
- .end = (U8500_USBOTG_BASE + SZ_64K - 1),
+ .start = UX500_USBOTG_BASE,
+ .end = (UX500_USBOTG_BASE + SZ_64K - 1),
.flags = IORESOURCE_MEM,
},
@@ -780,7 +675,7 @@ static struct resource usb_resources[] = {
},
};
-struct platform_device u8500_musb_device = {
+struct platform_device ux500_musb_device = {
.name = "musb_hdrc",
.id = 0,
.dev = {
@@ -793,20 +688,15 @@ struct platform_device u8500_musb_device = {
.resource = usb_resources,
};
-void __init u8500_map_io(void)
+void __init ux500_map_io(void)
{
- iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
-
- if (u8500_is_earlydrop())
- iotable_init(u8500_ed_io_desc, ARRAY_SIZE(u8500_ed_io_desc));
- else
- iotable_init(u8500_v1_io_desc, ARRAY_SIZE(u8500_v1_io_desc));
+ iotable_init(ux500_io_desc, ARRAY_SIZE(ux500_io_desc));
}
void __init u8500_init_irq(void)
{
- gic_dist_init(0, (void __iomem *)IO_ADDRESS(U8500_GIC_DIST_BASE), 29);
- gic_cpu_init(0, (void __iomem *)IO_ADDRESS(U8500_GIC_CPU_BASE));
+ gic_dist_init(0, (void __iomem *)IO_ADDRESS(UX500_GIC_DIST_BASE), 29);
+ gic_cpu_init(0, (void __iomem *)IO_ADDRESS(UX500_GIC_CPU_BASE));
/*
* Init clocks here so that they are available for system timer
@@ -870,86 +760,53 @@ struct uart_amba_plat_data uart2_plat = {
/* Remap of uart0 and uart2 when using SVP5500
* remove this when uart2 problem solved in SVP5500
*/
-struct amba_device u8500_uart2_device = {
+struct amba_device ux500_uart2_device = {
.dev = {.bus_id = "uart2", .platform_data = &uart0_plat, },
- __MEM_4K_RESOURCE(U8500_UART0_BASE),
+ __MEM_4K_RESOURCE(UX500_UART0_BASE),
.irq = {IRQ_UART0, NO_IRQ},
};
-struct amba_device u8500_uart1_device = {
+struct amba_device ux500_uart1_device = {
.dev = {.bus_id = "uart1", .platform_data = &uart1_plat, },
- __MEM_4K_RESOURCE(U8500_UART1_BASE),
+ __MEM_4K_RESOURCE(UX500_UART1_BASE),
.irq = {IRQ_UART1, NO_IRQ},
};
-struct amba_device u8500_uart0_device = {
+struct amba_device ux500_uart0_device = {
.dev = {.bus_id = "uart0", .platform_data = &uart2_plat, },
- __MEM_4K_RESOURCE(U8500_UART2_BASE),
+ __MEM_4K_RESOURCE(UX500_UART2_BASE),
.irq = {IRQ_UART2, NO_IRQ},
};
#else
-struct amba_device u8500_uart0_device = {
+struct amba_device ux500_uart0_device = {
.dev = {.bus_id = "uart0", .platform_data = &uart0_plat, },
- __MEM_4K_RESOURCE(U8500_UART0_BASE),
+ __MEM_4K_RESOURCE(UX500_UART0_BASE),
.irq = {IRQ_UART0, NO_IRQ},
};
-struct amba_device u8500_uart1_device = {
+struct amba_device ux500_uart1_device = {
.dev = {.bus_id = "uart1", .platform_data = &uart1_plat, },
- __MEM_4K_RESOURCE(U8500_UART1_BASE),
+ __MEM_4K_RESOURCE(UX500_UART1_BASE),
.irq = {IRQ_UART1, NO_IRQ},
};
-struct amba_device u8500_uart2_device = {
+struct amba_device ux500_uart2_device = {
.dev = {.bus_id = "uart2", .platform_data = &uart2_plat, },
- __MEM_4K_RESOURCE(U8500_UART2_BASE),
+ __MEM_4K_RESOURCE(UX500_UART2_BASE),
.irq = {IRQ_UART2, NO_IRQ},
};
#endif
-static struct platform_device *platform_core_devs[] __initdata = {
- &u8500_dma_device,
-};
-
-static struct amba_device *amba_core_devs[] __initdata = {
- &u8500_gpio0_device,
- &u8500_gpio1_device,
- &u8500_gpio2_device,
- &u8500_gpio3_device,
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- &u8500_gpio4_device,
-#endif
-};
-
#ifdef CONFIG_CACHE_L2X0
static int __init u8500_l2x0_init(void)
{
- l2x0_init((void *)IO_ADDRESS(U8500_L2CC_BASE), 0x3e060000, 0x3e060000);
+ l2x0_init((void *)IO_ADDRESS(UX500_L2CC_BASE), 0x3e060000, 0x3e060000);
return 0;
}
early_initcall(u8500_l2x0_init);
#endif
-static void __init u8500_earlydrop_fixup(void)
-{
- u8500_dma_resources[0].start = U8500_DMA_BASE_ED;
- u8500_dma_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
- u8500_shrm_resources[1].start = IRQ_CA_WAKE_REQ_ED;
- u8500_shrm_resources[1].end = IRQ_CA_WAKE_REQ_ED;
- u8500_shrm_resources[2].start = IRQ_AC_READ_NOTIFICATION_0_ED;
- u8500_shrm_resources[2].end = IRQ_AC_READ_NOTIFICATION_0_ED;
- u8500_shrm_resources[3].start = IRQ_AC_READ_NOTIFICATION_1_ED;
- u8500_shrm_resources[3].end = IRQ_AC_READ_NOTIFICATION_1_ED;
- u8500_shrm_resources[4].start = IRQ_CA_MSG_PEND_NOTIFICATION_0_ED;
- u8500_shrm_resources[4].end = IRQ_CA_MSG_PEND_NOTIFICATION_0_ED;
- u8500_shrm_resources[5].start = IRQ_CA_MSG_PEND_NOTIFICATION_1_ED;
- u8500_shrm_resources[5].end = IRQ_CA_MSG_PEND_NOTIFICATION_1_ED;
-#ifdef CONFIG_FB_U8500_MCDE_CHANNELB
- mcde1_channel_data.gpio_alt_func = GPIO_ALT_LCD_PANELB_ED;
-#endif
-}
-
void __init amba_add_devices(struct amba_device *devs[], int num)
{
int i;
@@ -1228,16 +1085,11 @@ static struct platform_device *u8500_regulators[] = {
#endif
-void __init u8500_init_devices(void)
+/* FIXME: move this to the appropriate file */
+void __init u8500_init_regulators(void)
{
#ifdef CONFIG_REGULATOR
/* we want the on-chip regulator before any device registration */
platform_add_devices(u8500_regulators, ARRAY_SIZE(u8500_regulators));
#endif
-
- if (u8500_is_earlydrop())
- u8500_earlydrop_fixup();
-
- amba_add_devices(amba_core_devs, ARRAY_SIZE(amba_core_devs));
- platform_add_devices(platform_core_devs, ARRAY_SIZE(platform_core_devs));
}
diff --git a/arch/arm/mach-u8500/gpio.c b/arch/arm/mach-u8500/gpio.c
deleted file mode 100644
index 5e029dc4fdb..00000000000
--- a/arch/arm/mach-u8500/gpio.c
+++ /dev/null
@@ -1,323 +0,0 @@
-/*
- * Copyright (C) 2010 ST-Ericsson
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2, as
- * published by the Free Software Foundation.
- */
-
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/io.h>
-#include <linux/interrupt.h>
-#include <linux/amba/bus.h>
-
-/* gpio alternate funtions on this platform */
-#define __GPIO_ALT(_fun, _start, _end, _cont, _type, _name) { \
- .altfun = _fun, \
- .start = _start, \
- .end = _end, \
- .cont = _cont, \
- .type = _type, \
- .dev_name = _name }
-
-static struct gpio_altfun_data gpio_altfun_table[] = {
- __GPIO_ALT(GPIO_ALT_I2C_4, 4, 5, 0, GPIO_ALTF_B, "i2c4"),
- __GPIO_ALT(GPIO_ALT_I2C_1, 16, 17, 0, GPIO_ALTF_B, "i2c1"),
- __GPIO_ALT(GPIO_ALT_I2C_2, 8, 9, 0, GPIO_ALTF_B, "i2c2"),
- __GPIO_ALT(GPIO_ALT_I2C_0, 147, 148, 0, GPIO_ALTF_A, "i2c0"),
- __GPIO_ALT(GPIO_ALT_I2C_3, 229, 230, 0, GPIO_ALTF_C, "i2c3"),
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- __GPIO_ALT(GPIO_ALT_UART_2, 177, 180, 0, GPIO_ALTF_A, "uart2"),
-#else
- __GPIO_ALT(GPIO_ALT_UART_2, 29, 32, 0, GPIO_ALTF_C, "uart2"),
-#endif
- __GPIO_ALT(GPIO_ALT_SSP_0, 143, 146, 0, GPIO_ALTF_A, "ssp0"),
- __GPIO_ALT(GPIO_ALT_SSP_1, 139, 142, 0, GPIO_ALTF_A, "ssp1"),
- __GPIO_ALT(GPIO_ALT_USB_OTG, 256, 267, 0, GPIO_ALTF_A, "usb"),
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- __GPIO_ALT(GPIO_ALT_UART_1, 200, 203, 0, GPIO_ALTF_A, "uart1"),
- __GPIO_ALT(GPIO_ALT_UART_0_NO_MODEM, 28, 29, 0, GPIO_ALTF_A, "uart0"),
-#else
- __GPIO_ALT(GPIO_ALT_UART_1, 4, 7, 0, GPIO_ALTF_A, "uart1"),
- __GPIO_ALT(GPIO_ALT_UART_0_NO_MODEM, 0, 3, 0, GPIO_ALTF_A, "uart0"),
- __GPIO_ALT(GPIO_ALT_UART_0_MODEM, 0, 3, 1, GPIO_ALTF_A, "uart0"),
- __GPIO_ALT(GPIO_ALT_UART_0_MODEM, 33, 36, 0, GPIO_ALTF_C, "uart0"),
-#endif
- __GPIO_ALT(GPIO_ALT_MSP_0, 12, 15, 0, GPIO_ALTF_A, "msp0"),
- __GPIO_ALT(GPIO_ALT_MSP_1, 33, 36, 0, GPIO_ALTF_A, "msp1"),
- __GPIO_ALT(GPIO_ALT_MSP_2, 192, 196, 0, GPIO_ALTF_A, "msp2"),
- __GPIO_ALT(GPIO_ALT_HSIR, 219, 221, 0, GPIO_ALTF_A, "hsir"),
- __GPIO_ALT(GPIO_ALT_HSIT, 222, 224, 0, GPIO_ALTF_A, "hsit"),
- __GPIO_ALT(GPIO_ALT_EMMC, 197, 207, 0, GPIO_ALTF_A, "emmc"),
- __GPIO_ALT(GPIO_ALT_SDMMC, 18, 28, 0, GPIO_ALTF_A, "sdmmc"),
- __GPIO_ALT(GPIO_ALT_SDIO, 208, 214, 0, GPIO_ALTF_A, "sdio"),
- __GPIO_ALT(GPIO_ALT_TRACE, 70, 74, 0, GPIO_ALTF_C, "stm"),
- __GPIO_ALT(GPIO_ALT_SDMMC2, 128, 138, 0, GPIO_ALTF_A, "mmc2"),
-#ifndef CONFIG_FB_NOMADIK_MCDE_CHANNELB_DISPLAY_VUIB_WVGA
- __GPIO_ALT(GPIO_ALT_LCD_PANELB_ED, 78, 85, 1, GPIO_ALTF_A, "mcde tvout"),
- __GPIO_ALT(GPIO_ALT_LCD_PANELB_ED, 150, 150, 0, GPIO_ALTF_B, "mcde tvout"),
- __GPIO_ALT(GPIO_ALT_LCD_PANELB, 78, 81, 1, GPIO_ALTF_A, "mcde tvout"),
- __GPIO_ALT(GPIO_ALT_LCD_PANELB, 150, 150, 0, GPIO_ALTF_B, "mcde tvout"),
-#else
- __GPIO_ALT(GPIO_ALT_LCD_PANELB, 153, 171, 1, GPIO_ALTF_B, "mcde tvout"),
- __GPIO_ALT(GPIO_ALT_LCD_PANELB, 64, 77, 0, GPIO_ALTF_A, "mcde tvout"),
-#endif
- __GPIO_ALT(GPIO_ALT_LCD_PANELA, 68, 68, 0, GPIO_ALTF_A, "mcde tvout"),
- __GPIO_ALT(GPIO_ALT_MMIO_INIT_BOARD, 141, 142, 0, GPIO_ALTF_B, "mmio"),
- __GPIO_ALT(GPIO_ALT_MMIO_CAM_SET_I2C, 8, 9, 0, GPIO_ALTF_A, "mmio"),
- __GPIO_ALT(GPIO_ALT_MMIO_CAM_SET_EXT_CLK, 227, 228, 0, GPIO_ALTF_A, "mmio"),
-#ifdef CONFIG_TOUCHP_EXT_CLK
- __GPIO_ALT(GPIO_ALT_TP_SET_EXT_CLK, 228, 228, 0, GPIO_ALTF_A, "u8500_tp1"),
-#endif
-};
-
-static struct gpio_block_data gpio0_block_data[] = {
- {
- .irq = IRQ_GPIO0,
- .base_offset = 0x0,
- .blocks_per_irq = 1,
- .block_base = 0,
- .block_size = 32,
- },
- {
- .irq = IRQ_GPIO1,
- .base_offset = 0x080,
- .blocks_per_irq = 1,
- .block_base = 32,
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- .block_size = 4,
-#else
- .block_size = 5,
-#endif
- }
-};
-static struct gpio_platform_data gpio0_platform_data = {
- .gpio_data = gpio0_block_data,
- .gpio_block_size = ARRAY_SIZE(gpio0_block_data),
-
- .altfun_table = gpio_altfun_table,
- .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
-};
-
-struct amba_device u8500_gpio0_device = {
- .dev = {
- .bus_id = "gpioblock0",
- .platform_data = &gpio0_platform_data,
- },
- .res = {
- .start = U8500_GPIO0_BASE,
- .end = U8500_GPIO0_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- .periphid = GPIO_PER_ID,
- .irq = {IRQ_GPIO0, NO_IRQ},
-};
-
-static struct gpio_block_data gpio1_block_data[] = {
- {
- .irq = IRQ_GPIO2,
- .base_offset = 0x0,
- .blocks_per_irq = 1,
- .block_base = 64,
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- .block_size = 19,
- }
-#else
- .block_size = 32,
- },
- {
- .irq = IRQ_GPIO3,
- .base_offset = 0x080,
- .blocks_per_irq = 1,
- .block_base = 96,
- .block_size = 2,
- },
- {
- .irq = IRQ_GPIO4,
- .base_offset = 0x100,
- .blocks_per_irq = 1,
- .block_base = 128,
- .block_size = 32,
- },
- {
- .irq = IRQ_GPIO5,
- .base_offset = 0x180,
- .blocks_per_irq = 1,
- .block_base = 160,
- .block_size = 12,
- }
-#endif
-};
-static struct gpio_platform_data gpio1_platform_data = {
- .gpio_data = gpio1_block_data,
- .gpio_block_size = ARRAY_SIZE(gpio1_block_data),
- .altfun_table = gpio_altfun_table,
- .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
-
-};
-
-struct amba_device u8500_gpio1_device = {
- .dev = {
- .bus_id = "gpioblock1",
- .platform_data = &gpio1_platform_data,
- },
- .res = {
- .start = U8500_GPIO1_BASE,
- .end = U8500_GPIO1_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- .periphid = GPIO_PER_ID,
- .irq = {IRQ_GPIO2, NO_IRQ},
-};
-
-static struct gpio_block_data gpio2_block_data[] = {
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- {
- .irq = IRQ_GPIO3,
- .base_offset = 0x0,
- .blocks_per_irq = 1,
- .block_base = 96,
- .block_size = 6,
- }
-#else
- {
- .irq = IRQ_GPIO6,
- .base_offset = 0x0,
- .blocks_per_irq = 1,
- .block_base = 192,
- .block_size = 32,
- },
- {
- .irq = IRQ_GPIO7,
- .base_offset = 0x080,
- .blocks_per_irq = 1,
- .block_base = 224,
- .block_size = 7,
- }
-#endif
-};
-static struct gpio_platform_data gpio2_platform_data = {
- .gpio_data = gpio2_block_data,
- .gpio_block_size = ARRAY_SIZE(gpio2_block_data),
- .altfun_table = gpio_altfun_table,
- .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
-
-};
-
-struct amba_device u8500_gpio2_device = {
- .dev = {
- .bus_id = "gpioblock2",
- .platform_data = &gpio2_platform_data,
- },
- .res = {
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- .start = U8500_GPIO4_BASE,
- .end = U8500_GPIO4_BASE + SZ_4K - 1,
-#else
- .start = U8500_GPIO2_BASE,
- .end = U8500_GPIO2_BASE + SZ_4K - 1,
-#endif
- .flags = IORESOURCE_MEM,
- },
- .periphid = GPIO_PER_ID,
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- .irq = {IRQ_GPIO3, NO_IRQ},
-#else
- .irq = {IRQ_GPIO6, NO_IRQ},
-#endif
-};
-
-static struct gpio_block_data gpio3_block_data[] = {
- {
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- .irq = IRQ_GPIO4,
- .base_offset = 0x0,
- .blocks_per_irq = 1,
- .block_base = 128,
- .block_size = 21,
-#else
- .irq = IRQ_GPIO8,
- .base_offset = 0x0,
- .blocks_per_irq = 1,
- .block_base = 256,
- .block_size = 12,
-#endif
- }
-};
-static struct gpio_platform_data gpio3_platform_data = {
- .gpio_data = gpio3_block_data,
- .gpio_block_size = ARRAY_SIZE(gpio3_block_data),
- .altfun_table = gpio_altfun_table,
- .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
-
-};
-
-struct amba_device u8500_gpio3_device = {
- .dev = {
- .bus_id = "gpioblock3",
- .platform_data = &gpio3_platform_data,
- },
- .res = {
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- .start = U8500_GPIO2_BASE,
- .end = U8500_GPIO2_BASE + SZ_4K - 1,
-#else
- .start = U8500_GPIO3_BASE,
- .end = U8500_GPIO3_BASE + SZ_4K - 1,
-#endif
- .flags = IORESOURCE_MEM,
- },
- .periphid = GPIO_PER_ID,
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- .irq = {IRQ_GPIO4, NO_IRQ},
-#else
- .irq = {IRQ_GPIO8, NO_IRQ},
-#endif
-};
-
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
-static struct gpio_block_data gpio4_block_data[] = {
- {
- .irq = IRQ_GPIO5,
- .base_offset = 0x0,
- .blocks_per_irq = 1,
- .block_base = 160,
- .block_size = 32,
- },
- {
- .irq = IRQ_GPIO6,
- .base_offset = 0x80,
- .blocks_per_irq = 1,
- .block_base = 192,
- .block_size = 32,
- },
- {
- .irq = IRQ_GPIO7,
- .base_offset = 0x100,
- .blocks_per_irq = 1,
- .block_base = 224,
- .block_size = 4,
- }
-};
-static struct gpio_platform_data gpio4_platform_data = {
- .gpio_data = gpio4_block_data,
- .gpio_block_size = ARRAY_SIZE(gpio4_block_data),
- .altfun_table = gpio_altfun_table,
- .altfun_table_size = ARRAY_SIZE(gpio_altfun_table)
-
-};
-struct amba_device u8500_gpio4_device = {
- .dev = {
- .bus_id = "gpioblock4",
- .platform_data = &gpio4_platform_data,
- },
- .res = {
- .start = U8500_GPIO3_BASE,
- .end = U8500_GPIO3_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- .periphid = GPIO_PER_ID,
- .irq = {IRQ_GPIO5, NO_IRQ},
-};
-#endif
diff --git a/arch/arm/mach-u8500/include/mach/db5500-regs.h b/arch/arm/mach-u8500/include/mach/db5500-regs.h
index 6f87ed42d1a..474f6d3d968 100644
--- a/arch/arm/mach-u8500/include/mach/db5500-regs.h
+++ b/arch/arm/mach-u8500/include/mach/db5500-regs.h
@@ -9,60 +9,88 @@
#ifndef __MACH_DB5500_REGS_H
#define __MACH_DB5500_REGS_H
-#define U8500_PER1_BASE 0xA0020000
-#define U8500_PER2_BASE 0xA0010000
-#define U8500_PER3_BASE 0x80140000
-#define U8500_PER4_BASE 0x80150000
-#define U8500_PER5_BASE 0x80100000
-#define U8500_PER6_BASE 0x80120000
-#define U8500_PER7_BASE 0xA03d0000
+#define U5500_PER1_BASE 0xA0020000
+#define U5500_PER2_BASE 0xA0010000
+#define U5500_PER3_BASE 0x80140000
+#define U5500_PER4_BASE 0x80150000
+#define U5500_PER5_BASE 0x80100000
+#define U5500_PER6_BASE 0x80120000
-#define U8500_GIC_DIST_BASE 0xA0411000
-#define U8500_GIC_CPU_BASE 0xA0410100
-#define U8500_DMA_BASE 0x90030000
-#define U8500_MCDE_BASE 0xA0400000
-#define U8500_MODEM_BASE 0xB0000000
-#define U8500_L2CC_BASE 0xA0412000
-#define U8500_SCU_BASE 0xA0410000
-#define U8500_DSI1_BASE 0xA0401000
-#define U8500_DSI2_BASE 0xA0402000
-#define U8500_DISPLAY_BASE 0xA0400000
-#define U8500_SIA_BASE 0xA0100000
-#define U8500_SVA_BASE 0x80200000
-#define U8500_HSEM_BASE 0xA0000000
-#define U8500_NAND0_BASE 0x60000000
-#define U8500_NAND1_BASE 0x70000000
+#define U5500_GIC_DIST_BASE 0xA0411000
+#define U5500_GIC_CPU_BASE 0xA0410100
+#define U5500_DMA_BASE 0x90030000
+#define U5500_MCDE_BASE 0xA0400000
+#define U5500_MODEM_BASE 0xB0000000
+#define U5500_L2CC_BASE 0xA0412000
+#define U5500_SCU_BASE 0xA0410000
+#define U5500_DSI1_BASE 0xA0401000
+#define U5500_DSI2_BASE 0xA0402000
+#define U5500_SIA_BASE 0xA0100000
+#define U5500_SVA_BASE 0x80200000
+#define U5500_HSEM_BASE 0xA0000000
+#define U5500_NAND0_BASE 0x60000000
+#define U5500_NAND1_BASE 0x70000000
+#define U5500_TWD_BASE 0xa0410600
+#define U5500_B2R2_BASE 0xa0200000
-#define U8500_TWD_BASE 0xa0410600
-#define U8500_TWD_SIZE 0x100
+#define U5500_FSMC_BASE (U5500_PER1_BASE + 0x0000)
+#define U5500_SDI0_BASE (U5500_PER1_BASE + 0x1000)
+#define U5500_SDI2_BASE (U5500_PER1_BASE + 0x2000)
+#define U5500_UART0_BASE (U5500_PER1_BASE + 0x3000)
+#define U5500_I2C1_BASE (U5500_PER1_BASE + 0x4000)
+#define U5500_MSP0_BASE (U5500_PER1_BASE + 0x5000)
+#define U5500_GPIO0_BASE (U5500_PER1_BASE + 0xE000)
+#define U5500_CLKRST1_BASE (U5500_PER1_BASE + 0xF000)
-#define U8500_DMA_BASE_ED 0x90030000
-#define U8500_DMA_BASE_V1 0x90030000
-#define U8500_B2R2_BASE 0xa0200000
+#define U5500_USBOTG_BASE (U5500_PER2_BASE + 0x0000)
+#define U5500_GPIO1_BASE (U5500_PER2_BASE + 0xE000)
+#define U5500_CLKRST2_BASE (U5500_PER2_BASE + 0xF000)
-#define U8500_GPIO1_BASE (U8500_PER2_BASE + 0xE000)
-#define U8500_GPIO2_BASE (U8500_PER3_BASE + 0xE000)
-#define U8500_GPIO4_BASE (U8500_PER4_BASE + 0x0A000)
+#define U5500_KEYPAD_BASE (U5500_PER3_BASE + 0x0000)
+#define U5500_PWM_BASE (U5500_PER3_BASE + 0x1000)
+#define U5500_GPIO3_BASE (U5500_PER3_BASE + 0xE000)
+#define U5500_CLKRST3_BASE (U5500_PER3_BASE + 0xF000)
-#define GPIO_BANK2_BASE (U8500_PER2_BASE + 0xE000)
-#define GPIO_BANK4_BASE (U8500_PER5_BASE + 0xE000 )
-#define GPIO_BANK5_BASE (U8500_PER5_BASE + 0xE000 + 0x80)
-#define GPIO_BANK6_BASE (U8500_PER5_BASE + 0xE000 + 0x100)
-#define GPIO_BANK7_BASE (U8500_PER4_BASE + 0x0A000 )
+#define U5500_BACKUPRAM0_BASE (U5500_PER4_BASE + 0x0000)
+#define U5500_BACKUPRAM1_BASE (U5500_PER4_BASE + 0x1000)
+#define U5500_RTT0_BASE (U5500_PER4_BASE + 0x2000)
+#define U5500_RTT1_BASE (U5500_PER4_BASE + 0x3000)
+#define U5500_RTC_BASE (U5500_PER4_BASE + 0x4000)
+#define U5500_SCR_BASE (U5500_PER4_BASE + 0x5000)
+#define U5500_DMC_BASE (U5500_PER4_BASE + 0x6000)
+#define U5500_PRCMU_BASE (U5500_PER4_BASE + 0x7000)
+#define U5500_MSP1_BASE (U5500_PER4_BASE + 0x9000)
+#define U5500_GPIO2_BASE (U5500_PER4_BASE + 0xA000)
+#define U5500_CDETECT_BASE (U5500_PER4_BASE + 0xF000)
-#define U8500_CR_BASE_ED (U8500_PER6_BASE + 0x8000)
-#define U8500_MTU0_BASE_ED (U8500_PER6_BASE + 0x6000)
-#define U8500_MTU1_BASE_ED (U8500_PER6_BASE + 0x7000)
+#define U5500_SPI0_BASE (U5500_PER5_BASE + 0x0000)
+#define U5500_SPI1_BASE (U5500_PER5_BASE + 0x1000)
+#define U5500_SPI2_BASE (U5500_PER5_BASE + 0x2000)
+#define U5500_SPI3_BASE (U5500_PER5_BASE + 0x3000)
+#define U5500_UART1_BASE (U5500_PER5_BASE + 0x4000)
+#define U5500_UART2_BASE (U5500_PER5_BASE + 0x5000)
+#define U5500_UART3_BASE (U5500_PER5_BASE + 0x6000)
+#define U5500_SDI1_BASE (U5500_PER5_BASE + 0x7000)
+#define U5500_SDI3_BASE (U5500_PER5_BASE + 0x8000)
+#define U5500_SDI4_BASE (U5500_PER5_BASE + 0x9000)
+#define U5500_I2C2_BASE (U5500_PER5_BASE + 0xA000)
+#define U5500_I2C3_BASE (U5500_PER5_BASE + 0xB000)
+#define U5500_MSP2_BASE (U5500_PER5_BASE + 0xC000)
+#define U5500_IRDA_BASE (U5500_PER5_BASE + 0xD000)
+#define U5500_IRRC_BASE (U5500_PER5_BASE + 0x10000)
+#define U5500_GPIO4_BASE (U5500_PER5_BASE + 0x1E000)
+#define U5500_CLKRST5_BASE (U5500_PER5_BASE + 0x1F000)
-/* per7 base addressess */
-#define U8500_TZPC0_BASE_ED (U8500_PER7_BASE + 0xc000)
-#define U8500_CLKRST7_BASE (U8500_PER7_BASE + 0xf000)
-
-#define U8500_I2C0_BASE (U8500_PER1_BASE + 0x4000)
-
-#define U8500_UART2_BASE (U8500_PER5_BASE + 0x5000)
-#define U8500_UART3_BASE (U8500_PER5_BASE + 0x6000)
-#define U8500_UART0_BASE (U8500_PER1_BASE + 0x3000)
-#define U8500_UART1_BASE (U8500_PER5_BASE + 0x4000)
+#define U5500_RNG_BASE (U5500_PER6_BASE + 0x0000)
+#define U5500_HASH0_BASE (U5500_PER6_BASE + 0x1000)
+#define U5500_HASH1_BASE (U5500_PER6_BASE + 0x2000)
+#define U5500_PKA_BASE (U5500_PER6_BASE + 0x4000)
+#define U5500_PKAM_BASE (U5500_PER6_BASE + 0x5000)
+#define U5500_MTU0_BASE (U5500_PER6_BASE + 0x6000)
+#define U5500_MTU1_BASE (U5500_PER6_BASE + 0x7000)
+#define U5500_CR_BASE (U5500_PER6_BASE + 0x8000)
+#define U5500_CRYP0_BASE (U5500_PER6_BASE + 0xA000)
+#define U5500_CRYP1_BASE (U5500_PER6_BASE + 0xB000)
+#define U5500_CLKRST6_BASE (U5500_PER6_BASE + 0xF000)
#endif
diff --git a/arch/arm/mach-u8500/include/mach/db8500-regs.h b/arch/arm/mach-u8500/include/mach/db8500-regs.h
index a5b7bcd5806..e3d62b94ffc 100644
--- a/arch/arm/mach-u8500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-u8500/include/mach/db8500-regs.h
@@ -28,7 +28,7 @@
#define U8500_SGA_BASE 0xa0300000
#define U8500_MCDE_BASE 0xa0350000
#define U8500_DMA_BASE_ED 0xa0362000
-#define U8500_DMA_BASE_V1 0x801C0000
+#define U8500_DMA_BASE 0x801C0000 /* v1 */
#define U8500_SCU_BASE 0xa0410000
#define U8500_GIC_CPU_BASE 0xa0410100
@@ -36,16 +36,10 @@
#define U8500_GIC_DIST_BASE 0xa0411000
#define U8500_L2CC_BASE 0xa0412000
-#define U8500_TWD_SIZE 0x100
-
+#define U8500_GPIO0_BASE (U8500_PER1_BASE + 0xE000)
#define U8500_GPIO1_BASE (U8500_PER3_BASE + 0xE000)
#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000)
-
-#define GPIO_BANK2_BASE (U8500_PER3_BASE + 0xE000)
-#define GPIO_BANK4_BASE (U8500_PER3_BASE + 0xE000 + 0x100)
-#define GPIO_BANK5_BASE (U8500_PER3_BASE + 0xE000 + 0x180)
-#define GPIO_BANK6_BASE (U8500_PER2_BASE + 0xE000)
-#define GPIO_BANK7_BASE (U8500_PER2_BASE + 0xE000 + 0x80)
+#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000)
/* per7 base addressess */
#define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000)
@@ -54,9 +48,70 @@
#define U8500_TZPC0_BASE_ED (U8500_PER7_BASE_ED + 0xc000)
#define U8500_CLKRST7_BASE (U8500_PER7_BASE_ED + 0xf000)
-#define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000)
-#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000)
#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000)
#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000)
+/* per6 base addressess */
+#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000)
+#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000)
+#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
+#define U8500_MTU0_BASE (U8500_PER6_BASE + 0x6000) /* v1 */
+#define U8500_MTU1_BASE (U8500_PER6_BASE + 0x7000) /* v1 */
+#define U8500_CR_BASE (U8500_PER6_BASE + 0x8000) /* v1 */
+#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000)
+#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
+#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000)
+
+/* per5 base addressess */
+#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000)
+#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000)
+
+/* per4 base addressess */
+#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000)
+#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000)
+#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000)
+#define U8500_RTT1_BASE (U8500_PER4_BASE + 0x03000)
+#define U8500_RTC_BASE (U8500_PER4_BASE + 0x04000)
+#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000)
+#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000)
+#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x0f000)
+
+/* per3 base addresses */
+#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000)
+#define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000)
+#define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000)
+#define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000)
+#define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000)
+#define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000)
+#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000)
+#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000)
+#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000)
+
+/* per2 base addressess */
+#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000)
+#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000)
+#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000)
+#define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000)
+#define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000)
+#define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000)
+#define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000)
+#define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000)
+#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000)
+#define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000)
+#define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000)
+#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000)
+
+/* per1 base addresses */
+#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000)
+#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000)
+#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000)
+#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000)
+#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000)
+#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000)
+#define U8500_I2C4_BASE (U8500_PER1_BASE + 0xa000)
+#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xb000)
+#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000)
+
+#define U8500_SHRM_GOP_INTERRUPT_BASE 0xB7C00040
+
#endif
diff --git a/arch/arm/mach-u8500/include/mach/debug-macro.S b/arch/arm/mach-u8500/include/mach/debug-macro.S
index e65bb09d07e..9cec503ff01 100644
--- a/arch/arm/mach-u8500/include/mach/debug-macro.S
+++ b/arch/arm/mach-u8500/include/mach/debug-macro.S
@@ -8,12 +8,13 @@
* published by the Free Software Foundation.
*
*/
+#include <mach/hardware.h>
+
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @MMU enabled?
- moveq \rx, #0x80000000 @MMU off, Physical address
- movne \rx, #0xF8000000 @MMU on, Virtual address
- orr \rx, \rx, #0x7000
+ ldreq \rx, =UX500_UART2_BASE @ no, physical address
+ ldrne \rx, =IO_ADDRESS(UX500_UART2_BASE) @ yes, virtual address
.endm
#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-u8500/include/mach/devices.h b/arch/arm/mach-u8500/include/mach/devices.h
index 79c3b813b02..0ffc1a05c3d 100644
--- a/arch/arm/mach-u8500/include/mach/devices.h
+++ b/arch/arm/mach-u8500/include/mach/devices.h
@@ -15,19 +15,25 @@ struct amba_device;
void __init u8500_register_device(struct platform_device *dev, void *data);
void __init u8500_register_amba_device(struct amba_device *dev, void *data);
+extern struct amba_device u5500_gpio0_device;
+extern struct amba_device u5500_gpio1_device;
+extern struct amba_device u5500_gpio2_device;
+extern struct amba_device u5500_gpio3_device;
+extern struct amba_device u5500_gpio4_device;
+
extern struct amba_device u8500_gpio0_device;
extern struct amba_device u8500_gpio1_device;
extern struct amba_device u8500_gpio2_device;
extern struct amba_device u8500_gpio3_device;
-extern struct amba_device u8500_gpio4_device;
+
extern struct platform_device u8500_msp0_device;
extern struct platform_device u8500_msp1_device;
extern struct platform_device u8500_msp2_device;
extern struct amba_device u8500_msp2_spi_device;
extern struct platform_device u8500_i2c0_device;
-extern struct platform_device u8500_i2c1_device;
-extern struct platform_device u8500_i2c2_device;
-extern struct platform_device u8500_i2c3_device;
+extern struct platform_device ux500_i2c1_device;
+extern struct platform_device ux500_i2c2_device;
+extern struct platform_device ux500_i2c3_device;
extern struct platform_device u8500_i2c4_device;
extern struct platform_device u8500_mcde2_device;
extern struct platform_device u8500_mcde3_device;
@@ -36,27 +42,24 @@ extern struct platform_device u8500_mcde0_device;
extern struct platform_device u8500_hsit_device;
extern struct platform_device u8500_hsir_device;
extern struct platform_device u8500_shrm_device;
-extern struct platform_device u8500_b2r2_device;
+extern struct platform_device ux500_b2r2_device;
extern struct platform_device u8500_pmem_device;
extern struct platform_device u8500_pmem_mio_device;
extern struct platform_device u8500_pmem_hwb_device;
-extern struct amba_device u8500_rtc_device;
-extern struct platform_device u8500_dma_device;
+extern struct amba_device ux500_rtc_device;
+extern struct platform_device ux500_dma_device;
extern struct amba_device u8500_ssp0_device;
extern struct amba_device u8500_ssp1_device;
-extern struct amba_device u8500_spi0_device;
-extern struct amba_device u8500_sdi4_device;
-extern struct amba_device u8500_sdi0_device;
-extern struct amba_device u8500_sdi1_device;
-extern struct amba_device u8500_sdi2_device;
+extern struct amba_device ux500_spi0_device;
+extern struct amba_device ux500_sdi4_device;
+extern struct amba_device ux500_sdi0_device;
+extern struct amba_device ux500_sdi1_device;
+extern struct amba_device ux500_sdi2_device;
extern struct platform_device u8500_ab8500_device;
-extern struct platform_device u8500_musb_device;
-extern struct amba_device u8500_uart2_device;
-extern struct amba_device u8500_uart1_device;
-extern struct amba_device u8500_uart0_device;
-extern struct amba_device u8500_uart0_device;
-extern struct amba_device u8500_uart1_device;
-extern struct amba_device u8500_uart2_device;
+extern struct platform_device ux500_musb_device;
+extern struct amba_device ux500_uart0_device;
+extern struct amba_device ux500_uart1_device;
+extern struct amba_device ux500_uart2_device;
/*
* Do not use inside drivers. Check it in the board file and alter platform
diff --git a/arch/arm/mach-u8500/include/mach/hardware.h b/arch/arm/mach-u8500/include/mach/hardware.h
index 583325fe06a..cd37b6bb1ee 100644
--- a/arch/arm/mach-u8500/include/mach/hardware.h
+++ b/arch/arm/mach-u8500/include/mach/hardware.h
@@ -19,96 +19,67 @@
*/
#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + IO_BASE)
-/*
- * Base address definitions for U8500 Onchip IPs. All the
- * peripherals are contained in a single 1 Mbyte region, with
- * AHB peripherals at the bottom and APB peripherals at the
- * top of the region. PER stands for PERIPHERAL region which
- * itself divided into sub regions.
- */
+#include <mach/db8500-regs.h>
+#include <mach/db5500-regs.h>
#ifdef CONFIG_UX500_SOC_DB8500
-#include <mach/db8500-regs.h>
+#define UX500(periph) U8500_##periph##_BASE
#elif defined(CONFIG_UX500_SOC_DB5500)
-#include <mach/db5500-regs.h>
+#define UX500(periph) U5500_##periph##_BASE
#endif
-/* gpio's are scattered in the memory map */
-#define U8500_GPIO_BASE (U8500_PER1_BASE + 0xE000)
-#define U8500_GPIO0_BASE (U8500_PER1_BASE + 0xE000)
-
-#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000)
-
-#define GPIO_BANK0_BASE (U8500_PER1_BASE + 0xE000)
-#define GPIO_BANK1_BASE (U8500_PER1_BASE + 0xE000 + 0x80)
-
-#define GPIO_BANK3_BASE (U8500_PER3_BASE + 0xE000 + 0x80)
-#define GPIO_BANK8_BASE (U8500_PER5_BASE + 0x1E000)
-
-/* per6 base addressess */
-#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000)
-#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000)
-#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
-#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000)
-#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
-#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000)
-
-#define U8500_MTU0_BASE_V1 (U8500_PER6_BASE + 0x6000)
-#define U8500_MTU1_BASE_V1 (U8500_PER6_BASE + 0x7000)
-#define U8500_CR_BASE_V1 (U8500_PER6_BASE + 0x8000)
-
-/* per5 base addressess */
-#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000)
-#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000)
-
-/* per4 base addressess */
-#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000)
-#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000)
-#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000)
-#define U8500_RTT1_BASE (U8500_PER4_BASE + 0x03000)
-#define U8500_RTC_BASE (U8500_PER4_BASE + 0x04000)
-#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000)
-#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000)
-#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000)
-#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x0f000)
-
-/* per3 base addressess */
-#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000)
-#define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000)
-#define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000)
-
-#define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000)
-#define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000)
-
-#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000)
-#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000)
-
-/* per2 base addressess */
-#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000)
-#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000)
-#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000)
-#define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000)
-#define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000)
-#define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000)
-#define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000)
-#define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000)
-#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000)
-#define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000)
-#define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000)
-#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000)
-
-/* per1 base addresses */
-#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000)
-#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000)
-#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000)
-#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000)
-#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000)
-#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000)
-#define U8500_I2C4_BASE (U8500_PER1_BASE + 0xa000)
-#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xb000)
-#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000)
-
-#define U8500_SHRM_GOP_INTERRUPT_BASE 0xB7C00040
+#define UX500_BACKUPRAM0_BASE UX500(BACKUPRAM0)
+#define UX500_BACKUPRAM1_BASE UX500(BACKUPRAM1)
+#define UX500_B2R2_BASE UX500(B2R2)
+
+#define UX500_CLKRST1_BASE UX500(CLKRST1)
+#define UX500_CLKRST2_BASE UX500(CLKRST2)
+#define UX500_CLKRST3_BASE UX500(CLKRST3)
+#define UX500_CLKRST5_BASE UX500(CLKRST5)
+#define UX500_CLKRST6_BASE UX500(CLKRST6)
+
+#define UX500_DMA_BASE UX500(DMA)
+#define UX500_FSMC_BASE UX500(FSMC)
+
+#define UX500_GIC_CPU_BASE UX500(GIC_CPU)
+#define UX500_GIC_DIST_BASE UX500(GIC_DIST)
+
+#define UX500_I2C1_BASE UX500(I2C1)
+#define UX500_I2C2_BASE UX500(I2C2)
+#define UX500_I2C3_BASE UX500(I2C3)
+
+#define UX500_L2CC_BASE UX500(L2CC)
+#define UX500_MCDE_BASE UX500(MCDE)
+#define UX500_MTU0_BASE UX500(MTU0)
+#define UX500_MTU1_BASE UX500(MTU1)
+#define UX500_PRCMU_BASE UX500(PRCMU)
+
+#define UX500_RNG_BASE UX500(RNG)
+#define UX500_RTC_BASE UX500(RTC)
+
+#define UX500_SCU_BASE UX500(SCU)
+
+#define UX500_SDI0_BASE UX500(SDI0)
+#define UX500_SDI1_BASE UX500(SDI1)
+#define UX500_SDI2_BASE UX500(SDI2)
+#define UX500_SDI3_BASE UX500(SDI3)
+#define UX500_SDI4_BASE UX500(SDI4)
+
+#define UX500_SPI0_BASE UX500(SPI0)
+#define UX500_SPI1_BASE UX500(SPI1)
+#define UX500_SPI2_BASE UX500(SPI2)
+#define UX500_SPI3_BASE UX500(SPI3)
+
+#define UX500_SIA_BASE UX500(SIA)
+#define UX500_SVA_BASE UX500(SVA)
+
+#define UX500_TWD_BASE UX500(TWD)
+
+#define UX500_UART0_BASE UX500(UART0)
+#define UX500_UART1_BASE UX500(UART1)
+#define UX500_UART2_BASE UX500(UART2)
+
+#define UX500_USBOTG_BASE UX500(USBOTG)
#define U8500_ESRAM_BASE 0x40000000
#define U8500_ESRAM_DMA_LCLA_OFFSET 0x80000
diff --git a/arch/arm/mach-u8500/include/mach/setup.h b/arch/arm/mach-u8500/include/mach/setup.h
index 414c67f93f3..7da8d8d6a92 100644
--- a/arch/arm/mach-u8500/include/mach/setup.h
+++ b/arch/arm/mach-u8500/include/mach/setup.h
@@ -14,12 +14,29 @@
#include <asm/mach/time.h>
#include <linux/init.h>
+struct sys_timer;
+struct amba_device;
+
+extern void __init ux500_map_io(void);
+extern void __init u5500_map_io(void);
extern void __init u8500_map_io(void);
+
+extern void __init ux500_init_devices(void);
+extern void __init u5500_init_devices(void);
extern void __init u8500_init_devices(void);
+extern void __init u8500_init_regulators(void);
+
extern void __init u8500_init_irq(void);
extern void __init amba_add_devices(struct amba_device *devs[], int num);
-struct sys_timer;
+
extern struct sys_timer u8500_timer;
+#define __IO_DEV_DESC(x, sz) { \
+ .virtual = IO_ADDRESS(x), \
+ .pfn = __phys_to_pfn(x), \
+ .length = sz, \
+ .type = MT_DEVICE, \
+}
+
#endif /* __ASM_ARCH_SETUP_H */
diff --git a/arch/arm/mach-u8500/include/mach/system.h b/arch/arm/mach-u8500/include/mach/system.h
index 8f76dac336e..dd2e7277d93 100644
--- a/arch/arm/mach-u8500/include/mach/system.h
+++ b/arch/arm/mach-u8500/include/mach/system.h
@@ -21,7 +21,9 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode)
{
+#ifdef CONFIG_UX500_SOC_DB8500
prcmu_system_reset();
+#endif
}
#endif
diff --git a/arch/arm/mach-u8500/mcde.c b/arch/arm/mach-u8500/mcde.c
index f8b4578dd9b..c7746426b43 100644
--- a/arch/arm/mach-u8500/mcde.c
+++ b/arch/arm/mach-u8500/mcde.c
@@ -567,7 +567,11 @@ static struct mcde_channel_data mcde1_channel_data = {
.bpp16_type = 1,
.bgrinput = 0x0,
#endif
+#ifdef CONFIG_MCDE_ENABLE_FEATURE_HW_V1_SUPPORT
.gpio_alt_func = GPIO_ALT_LCD_PANELB
+#else
+ .gpio_alt_func = GPIO_ALT_LCD_PANELB_ED
+#endif
};
struct platform_device u8500_mcde1_device = {
diff --git a/arch/arm/mach-u8500/mop500-sdi.c b/arch/arm/mach-u8500/mop500-sdi.c
index 93f05d2cea0..c1d3d97e046 100644
--- a/arch/arm/mach-u8500/mop500-sdi.c
+++ b/arch/arm/mach-u8500/mop500-sdi.c
@@ -260,12 +260,12 @@ static struct mmc_board emmc_data = {
static int __init mop500_sdi_init(void)
{
if (!cpu_is_u8500ed())
- u8500_register_amba_device(&u8500_sdi2_device, &sdi2_data);
+ u8500_register_amba_device(&ux500_sdi2_device, &sdi2_data);
- u8500_register_amba_device(&u8500_sdi4_device, &emmc_data);
- u8500_register_amba_device(&u8500_sdi0_device, &mmc_data);
+ u8500_register_amba_device(&ux500_sdi4_device, &emmc_data);
+ u8500_register_amba_device(&ux500_sdi0_device, &mmc_data);
#ifdef CONFIG_U8500_SDIO
- u8500_register_amba_device(&u8500_sdi1_device, &sdi1_data);
+ u8500_register_amba_device(&ux500_sdi1_device, &sdi1_data);
#endif
return 0;
diff --git a/arch/arm/mach-u8500/mop500_devices.c b/arch/arm/mach-u8500/mop500_devices.c
index 3d4bce05880..239f013b140 100644
--- a/arch/arm/mach-u8500/mop500_devices.c
+++ b/arch/arm/mach-u8500/mop500_devices.c
@@ -857,30 +857,26 @@ static struct platform_device *u8500_platform_devices[] __initdata = {
};
static struct amba_device *amba_board_devs[] __initdata = {
- &u8500_uart0_device,
- &u8500_uart1_device,
- &u8500_uart2_device,
-#if !defined(CONFIG_MACH_U5500_SIMULATOR)
+ &ux500_uart0_device,
+ &ux500_uart1_device,
+ &ux500_uart2_device,
&u8500_ssp0_device,
&u8500_ssp1_device,
- &u8500_spi0_device,
+ &ux500_spi0_device,
&u8500_msp2_spi_device,
- &u8500_rtc_device,
-#endif
};
static struct platform_device *platform_board_devs[] __initdata = {
&u8500_msp0_device,
&u8500_msp1_device,
&u8500_msp2_device,
-#if !defined(CONFIG_MACH_U8500_SIMULATOR)
&u8500_hsit_device,
&u8500_hsir_device,
&u8500_shrm_device,
&u8500_ab8500_device,
&ab8500_gpadc_device,
&ab8500_bm_device,
- &u8500_musb_device,
+ &ux500_musb_device,
#ifdef CONFIG_FB_U8500_MCDE_CHANNELC0
&u8500_mcde2_device,
#endif /* CONFIG_FB_U8500_MCDE_CHANNELC0 */
@@ -893,11 +889,10 @@ static struct platform_device *platform_board_devs[] __initdata = {
#ifdef CONFIG_FB_U8500_MCDE_CHANNELA
&u8500_mcde0_device,
#endif /* CONFIG_FB_U8500_MCDE_CHANNELA */
- &u8500_b2r2_device,
+ &ux500_b2r2_device,
&u8500_pmem_device,
&u8500_pmem_mio_device,
&u8500_pmem_hwb_device,
-#endif
};
static void __init mop500_platdata_init(void)
@@ -908,18 +903,17 @@ static void __init mop500_platdata_init(void)
static void __init mop500_i2c_init(void)
{
u8500_register_device(&u8500_i2c0_device, &u8500_i2c0_data);
-#if !defined(CONFIG_MACH_U5500_SIMULATOR)
- u8500_register_device(&u8500_i2c1_device, &u8500_i2c1_data);
- u8500_register_device(&u8500_i2c2_device, &u8500_i2c2_data);
- u8500_register_device(&u8500_i2c3_device, &u8500_i2c3_data);
+ u8500_register_device(&ux500_i2c1_device, &u8500_i2c1_data);
+ u8500_register_device(&ux500_i2c2_device, &u8500_i2c2_data);
+ u8500_register_device(&ux500_i2c3_device, &u8500_i2c3_data);
if (!u8500_is_earlydrop())
u8500_register_device(&u8500_i2c4_device, &u8500_i2c4_data);
-#endif
}
static void __init mop500_init_machine(void)
{
+ u8500_init_regulators();
u8500_init_devices();
mop500_platdata_init();
@@ -930,13 +924,11 @@ static void __init mop500_init_machine(void)
mop500_i2c_init();
/* enable RTC as a wakeup capable */
- device_init_wakeup(&u8500_rtc_device.dev, true);
+ device_init_wakeup(&ux500_rtc_device.dev, true);
-#if !defined(CONFIG_MACH_U5500_SIMULATOR)
stm_gpio_altfuncenable(GPIO_ALT_UART_0_NO_MODEM);
stm_gpio_altfuncenable(GPIO_ALT_UART_1);
stm_gpio_altfuncenable(GPIO_ALT_UART_2);
-#endif
if (MOP500_PLATFORM_ID == platform_id)
i2c_register_board_info(0, nmdk_i2c0_egpio_devices,
@@ -963,13 +955,8 @@ static void __init mop500_init_machine(void)
MACHINE_START(NOMADIK, "ST-Ericsson U8500 Platform")
/* Maintainer: ST-Ericsson */
-#if defined(CONFIG_MACH_U5500_SIMULATOR)
- .phys_io = U8500_UART0_BASE,
- .io_pg_offst = (IO_ADDRESS(U8500_UART0_BASE) >> 18) & 0xfffc,
-#else
- .phys_io = U8500_UART2_BASE,
- .io_pg_offst = (IO_ADDRESS(U8500_UART2_BASE) >> 18) & 0xfffc,
-#endif
+ .phys_io = UX500_UART2_BASE,
+ .io_pg_offst = (IO_ADDRESS(UX500_UART2_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
.map_io = u8500_map_io,
.init_irq = u8500_init_irq,
diff --git a/arch/arm/mach-u8500/platsmp.c b/arch/arm/mach-u8500/platsmp.c
index 56f5ea259ae..8349b0c87c8 100644
--- a/arch/arm/mach-u8500/platsmp.c
+++ b/arch/arm/mach-u8500/platsmp.c
@@ -30,7 +30,7 @@ static unsigned int __init get_core_count(void)
{
unsigned int ncores;
- ncores = __raw_readl(IO_ADDRESS(U8500_SCU_BASE) + SCU_CONFIG);
+ ncores = __raw_readl(IO_ADDRESS(UX500_SCU_BASE) + SCU_CONFIG);
return (ncores & 0x03) + 1;
}
@@ -42,9 +42,9 @@ static void scu_enable(void)
{
u32 scu_ctrl;
- scu_ctrl = __raw_readl(IO_ADDRESS(U8500_SCU_BASE) + SCU_CTRL);
+ scu_ctrl = __raw_readl(IO_ADDRESS(UX500_SCU_BASE) + SCU_CTRL);
scu_ctrl |= 1;
- __raw_writel(scu_ctrl, IO_ADDRESS(U8500_SCU_BASE) + SCU_CTRL);
+ __raw_writel(scu_ctrl, IO_ADDRESS(UX500_SCU_BASE) + SCU_CTRL);
}
static DEFINE_SPINLOCK(boot_lock);
@@ -64,7 +64,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, (void __iomem *)IO_ADDRESS(U8500_GIC_CPU_BASE));
+ gic_cpu_init(0, (void __iomem *)IO_ADDRESS(UX500_GIC_CPU_BASE));
/*
* let the primary processor know we're out of the
@@ -147,11 +147,11 @@ static void __init wakeup_secondary(void)
*/
#define U8500_CPU1_JUMPADDR_OFFSET 0x1FF4
__raw_writel(virt_to_phys(u8500_secondary_startup),
- (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) +
+ (void __iomem *)IO_ADDRESS(UX500_BACKUPRAM0_BASE) +
U8500_CPU1_JUMPADDR_OFFSET);
#define U8500_CPU1_WAKEMAGIC_OFFSET 0x1FF0
__raw_writel(0xA1FEED01,
- (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) +
+ (void __iomem *)IO_ADDRESS(UX500_BACKUPRAM0_BASE) +
U8500_CPU1_WAKEMAGIC_OFFSET);
mb();
}
diff --git a/arch/arm/mach-u8500/timer.c b/arch/arm/mach-u8500/timer.c
index b43656db1d0..bfe5545bfac 100644
--- a/arch/arm/mach-u8500/timer.c
+++ b/arch/arm/mach-u8500/timer.c
@@ -151,7 +151,7 @@ static void __init u8500_timer_init(void)
int bits;
#ifdef CONFIG_LOCAL_TIMERS
- twd_base = (void *)IO_ADDRESS(U8500_TWD_BASE);
+ twd_base = (void *)IO_ADDRESS(UX500_TWD_BASE);
#endif
clk0 = clk_get_sys("mtu0", NULL);
BUG_ON(IS_ERR(clk0));
@@ -166,12 +166,12 @@ static void __init u8500_timer_init(void)
u8500_cycle = (rate + HZ/2) / HZ;
/* Save global pointer to mtu, used by functions above */
- if (u8500_is_earlydrop()) {
+ if (cpu_is_u8500ed()) {
mtu0_base = (void *)IO_ADDRESS(U8500_MTU0_BASE_ED);
mtu1_base = (void *)IO_ADDRESS(U8500_MTU1_BASE_ED);
} else {
- mtu0_base = (void *)IO_ADDRESS(U8500_MTU0_BASE_V1);
- mtu1_base = (void *)IO_ADDRESS(U8500_MTU1_BASE_V1);
+ mtu0_base = (void *)IO_ADDRESS(UX500_MTU0_BASE);
+ mtu1_base = (void *)IO_ADDRESS(UX500_MTU1_BASE);
}
/* Init the timer and register clocksource */