diff options
| author | Jean-Luc Leger <jean-luc.leger@dspnet.fr.eu.org> | 2006-06-23 02:05:19 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-23 07:43:03 -0700 |
| commit | 1e11d2782b2f8e86d22ad92c75b70ec8cad14dcf (patch) | |
| tree | c019b56dd2031f33bedcb976c35281836c80c19b | |
| parent | 260ea1013283d8acbb451459ed1ca560c1445c20 (diff) | |
[PATCH] clean up default value of SCHED_SMT
Default values for boolean and tristate options can only be 'y', 'm' or 'n'.
This patch removes wrong default for SCHED_SMT.
Signed-off-by: Jean-Luc Leger <jean-luc.leger@dspnet.fr.eu.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| -rw-r--r-- | arch/i386/Kconfig | 1 | ||||
| -rw-r--r-- | arch/ia64/Kconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/Kconfig | 1 |
3 files changed, 0 insertions, 3 deletions
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig index 15d23da2455..1596101cfaf 100644 --- a/arch/i386/Kconfig +++ b/arch/i386/Kconfig @@ -230,7 +230,6 @@ config NR_CPUS config SCHED_SMT bool "SMT (Hyperthreading) scheduler support" depends on SMP - default off help SMT scheduler support improves the CPU scheduler's decision making when dealing with Intel Pentium 4 chips with HyperThreading at a diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 0f3076a820c..c1c9b422408 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -273,7 +273,6 @@ config HOTPLUG_CPU config SCHED_SMT bool "SMT scheduler support" depends on SMP - default off help Improves the CPU scheduler's decision making when dealing with Intel IA64 chips with MultiThreading at a cost of slightly increased diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 7b829c754d0..e922a88b2ba 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -718,7 +718,6 @@ config PPC_64K_PAGES config SCHED_SMT bool "SMT (Hyperthreading) scheduler support" depends on PPC64 && SMP - default off help SMT scheduler support improves the CPU scheduler's decision making when dealing with POWER5 cpus at a cost of slightly increased |