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2011-10-24Merge branch 'devicetree/arm-linaro-3.1' of ↵linux-linaro-3.1-2011.10-2Nicolas Pitre
git://git.secretlab.ca/git/linux-2.6 into linaro-3.1
2011-10-24Merge commit 'v3.1' into linaro-3.1Nicolas Pitre
2011-10-24arm/dt: vexpress: add basic DT platform matching supportGrant Likely
This patch adds a DT match table to the Versatile Express machine description in order to enable basic device tree support. Tested on a Versatile Express board where the device tree blob is passed to the kernel by u-boot. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [converted .dts file to use skeleton.dtsi, and added 'dtbs' targets] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-24arm/dt: Add basic device tree support for mx51 and mx53 boardsGrant Likely
This patch add support for the Genesi Efika MX Smarttop and Smartbook, the Freescale mx51 babbage board, and the Freescale mx53 loco board Signed-off-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-24arm/dt: Add basic device tree support for smdkv310 boardThomas Abraham
Enable basic device tree support for Exynos4 smdkv310 board. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-24arm/dt: omap3 basic device tree board supportGrant Likely
Enable basic device tree support for the Gumstix Overo, IGEP, Panda and Beagle OMAP boards Signed-off-by: Andy Doan <andy.doan@linaro.org> Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-24arm/dt: add versatile dtb build rulesShawn Guo
Makes 'make dtbs' build the versatile .dtb files when versatile is enabled. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-10-22ARM: S3C24XX: Fix s3c24xx build errors if !CONFIG_PMDomenico Andreoli
v2: - register_syscore_ops(&s3c24xx_irq_syscore_ops) does not need to be conditionally compiled out, it is already optimized out on !CONFIG_PM - fix also s3c2412 and s3c2416 affected by the same build issue v1: s3c2440.c fails to build if !CONFIG_PM because in such case s3c2410_pm_syscore_ops is not defined. Same error should happen also in s3c2410.c and s3c2442.c Signed-off-by: Domenico Andreoli <cavokz@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-21ARM: S5P: fix offset calculation on gpio-interruptMarek Szyprowski
Offsets of the irq controller registers were calculated correctly only for first GPIO bank. This patch fixes calculation of the register offsets for all GPIO banks. Reported-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-20ARM: mach-exynos4: move boot_params to atag_offsetNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-10-19Merge branch 'imx_mx5_mx51' of ↵linux-linaro-3.1-2011.10-1Nicolas Pitre
git://git.linaro.org/people/rob_lee/imx_cpuidle into linaro-3.1
2011-10-19ARM: kprobes: Fix build error in test codeJon Medhurst (Tixy)
When compiling kprobes-test-thumb.c an error like below may occur: /tmp/ccKcuJcG.s:19179: Error: offset out of range This is caused by the compiler underestimating the size of the inline assembler instructions containing ".space 0x1000" and failing to spill the literal pool in time to prevent the generation of PC relative load instruction with invalid offsets. The fix implemented by this patch is to replace a single large .space directive by a number of 4 byte .space's. This requires splitting the macros which generate test cases for branch instructions into two forms: one with, and one without support for inserting extra code between branch and target. Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-10-19ARM: imx: Add cpuidle for i.MX51Robert Lee
Add imx cpuidle init call for i.MX51 SoC Signed-off-by: Robert Lee <rob.lee@linaro.org>
2011-10-19ARM: imx: Add cpuidle for mach-mx5Robert Lee
Add functionality for initialization and handling of a cpuidle driver requests entering a cpu idle state. Signed-off-by: Robert Lee <rob.lee@linaro.org>
2011-10-19ARM: imx: Add imx cpuidle driverRobert Lee
Introduce a new cpuidle driver which provides the common cpuidle functionality necessary for any imx soc cpuidle implementation. Signed-off-by: Robert Lee <rob.lee@linaro.org>
2011-10-17ARM: kprobes: work around build errorsArnd Bergmann
I got a few build errors for kprobes playing with randconfig on the latest kernel. While this patch manages to avoid these errors, I'm pretty sure that it is not the ideal solution. The errors I got in arm are while building for ARMv6 with the arm-linux-gnueabihf-gcc-4.6 provided by Linaro, which results in these messages: /tmp/ccGpftnj.s: Assembler messages: /tmp/ccGpftnj.s:22066: Error: selected processor does not support ARM mode `mls r0,r1,r2,r3' /tmp/ccGpftnj.s:22099: Error: selected processor does not support ARM mode `mlshi r7,r8,r9,r10' /tmp/ccGpftnj.s:22128: Error: selected processor does not support ARM mode `mls lr,r1,r2,r13' /tmp/ccGpftnj.s:23781: Error: selected processor does not support ARM mode `strexd r0,r2,r3,[sp]' /tmp/ccGpftnj.s:23802: Error: selected processor does not support ARM mode `ldrexd r2,r3,[sp]' /tmp/ccGpftnj.s:23823: Error: selected processor does not support ARM mode `strexb r0,r2,[sp]' /tmp/ccGpftnj.s:23844: Error: selected processor does not support ARM mode `ldrexb r2,[sp]' /tmp/ccGpftnj.s:23865: Error: selected processor does not support ARM mode `strexh r0,r2,[sp]' /tmp/ccGpftnj.s:23886: Error: selected processor does not support ARM mode `ldrexh r2,[sp]' /tmp/ccGpftnj.s:25836: Warning: base register written back, and overlaps second transfer register [ NP: I didn't reproduce the T2 errors, and Tixy was doubtful about them. Merged Tixy's change suggestions and his ACK. ] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-10-17Add ARM cpu topology definitionVincent Guittot
(Patch accepted by Russell for 3.1: http://www.spinics.net/lists/arm-kernel/msg131273.html) The affinity between ARM processors is defined in the MPIDR register. We can identify which processors are in the same cluster, and which ones have performance interdependency. We can define the cpu topology of ARM platform, that is then used by sched_mc and sched_smt. The default state of sched_mc and sched_smt config is disable. When enabled, the behavior of the scheduler can be modified with sched_mc_power_savings and sched_smt_power_savings sysfs interfaces. Changes since v4 : * Remove unnecessary parentheses and blank lines Changes since v3 : * Update the format of printk message * Remove blank line Changes since v2 : * Update the commit message and some comments Changes since v1 : * Update the commit message * Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h * Modify header of arch/arm/kernel/topology.c * Modify tests and manipulation of MPIDR's bitfields * Modify the place and dependancy of the config * Modify Noop functions Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Amit Kucheria <amit.kucheria@verdurent.com> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-10-17Merge remote-tracking branch 'rmk/devel-stable' into linaro-3.1Nicolas Pitre
2011-10-17ARM: 7031/1: entry: Fix Thumb-2 undef handling for multi-CPU kernelsDave Martin
When v6 and >=v7 boards are supported in the same kernel, the __und_usr code currently makes a build-time assumption that Thumb-2 instructions occurring in userspace don't need to be supported. Strictly speaking this is incorrect. This patch fixes the above case by doing a run-time check on the CPU architecture in these cases. This only affects kernels which support v6 and >=v7 CPUs together: plain v6 and plain v7 kernels are unaffected. Signed-off-by: Dave Martin <dave.martin@linaro.org> Reviewed-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit ef4c53687e0adf5409896c4fa688b15f8d4dc0c0)
2011-10-17ARM: 7030/1: entry: Remove unnecessary masking when decoding Thumb-2 ↵Dave Martin
instructions When testing whether a Thumb-2 instruction is 32 bits long or not, the masking done in order to test bits 11-15 of the first instruction halfword won't affect the result of the comparison, so remove it. Signed-off-by: Dave Martin <dave.martin@linaro.org> Reviewed-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit 85519189df91c8aa9c368de0bdcfd7812200e614)
2011-10-17ARM: 7029/1: Make cpu_architecture into a global variableDave Martin
The CPU architecture really should not be changing at runtime, so make it a global variable instead of a function. The cpu_architecture() function declared in <asm/system.h> remains the correct way to read this variable from C code. Signed-off-by: Dave Martin <dave.martin@linaro.org> Reviewed-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit 2ecccf90f2a6d821af4d33f086d59895e5d3bedc)
2011-10-17ARM: EXYNOS4: Add support for ORIGEN boardJeongHyeon Kim
Insignal's ORIGEN board is based Samsung EXYNOS4210 SoC. Signed-off-by: JeongHyeon Kim <jhkim@insignal.co.kr> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> [kgene.kim@samsung.com: Fixed SoC name to EXYNOS4210] [kgene.kim@samsung.com: Selected MACH_ORIGEN in exynos4_defconfig] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> (cherry picked from commit 699efdd2d34c535f415516e06d3d9f0bed131664) (cherry picked from commit af7a950284af5526a26b4ae4809c1104b4dc47f3)
2011-10-16Merge branch 'fixes' of ↵Linus Torvalds
http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUS ARM: 7122/1: localtimer: add header linux/errno.h explicitly ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9 ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGES
2011-10-15ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUSZoltan Devai
This is unneeded and causes an abort on the SPMP8000 platform. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Zoltan Devai <zoss@devai.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-15ARM: 7122/1: localtimer: add header linux/errno.h explicitlyShawn Guo
Per the text in Documentation/SubmitChecklist as below, we should explicitly have header linux/errno.h in localtimer.h for ENXIO reference. 1: If you use a facility then #include the file that defines/declares that facility. Don't depend on other header files pulling in ones that you use. Otherwise, we may run into some compiling error like the following one, if any file includes localtimer.h without CONFIG_LOCAL_TIMERS defined. arch/arm/include/asm/localtimer.h: In function ‘local_timer_setup’: arch/arm/include/asm/localtimer.h:53:10: error: ‘ENXIO’ undeclared (first use in this function) Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-15ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9Will Deacon
Using COHERENT_LINE_{MISS,HIT} for cache misses and references respectively is completely wrong. Instead, use the L1D events which are a better and more useful approximation despite ignoring instruction traffic. Reported-by: Alasdair Grant <alasdair.grant@arm.com> Reported-by: Matt Horsnell <matt.horsnell@arm.com> Reported-by: Michael Williams <michael.williams@arm.com> Cc: stable@kernel.org Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-10Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds
* 'fixes' of git://git.linaro.org/people/arnd/arm-soc: ARM: mach-ux500: enable fix for ARM errata 754322 ARM: OMAP: musb: Remove a redundant omap4430_phy_init call in usb_musb_init ARM: OMAP: Fix i2c init for twl4030 ARM: OMAP4: MMC: fix power and audio issue, decouple USBC1 from MMC1
2011-10-10ARM: tegra: fix compilation error due to mach/hardware.h removalMarc Dietrich
This fixes a compilation error in cpu-tegra.c which was introduced in dc8d966bccde ("ARM: convert PCI defines to variables") which removed the now obsolete mach/hardware.h from the mach-tegra subtree. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-10-08Merge branch 'omap/fixes-for-3.1' into fixesArnd Bergmann
2011-10-08ARM: 7127/1: hw_breakpoint: skip v7-specific reset on v6 coresWill Deacon
ARMv6 cores do not implement the DBGOSLAR register, so we don't need to try and clear it on boot. Furthermore, the VCR is zeroed out of reset, so we don't need to zero it explicitly when a CPU comes online. Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-07ARM: mach-ux500: enable fix for ARM errata 754322srinidhi kasagar
This applies ARM errata fix 754322 for all ux500 platforms. Cc: stable@kernel.org Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-01ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGESLinus Walleij
The VM subsystem assumes that there are valid memmap entries from the bank start aligned to MAX_ORDER_NR_PAGES. On the Ux500 we have a lot of mem=N arguments on the commandline triggering this bug several times over and causing kernel oops messages. Cc: stable@kernel.org Cc: Michael Bohan <mbohan@codeaurora.org> Cc: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Johan Palsson <johan.palsson@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-30ARM: OMAP: musb: Remove a redundant omap4430_phy_init call in usb_musb_initAxel Lin
Current code calls omap4430_phy_init() twice in usb_musb_init(). Calling omap4430_phy_init() once is enough. This patch removes the first omap4430_phy_init() call, which using an uninitialized pointer as parameter. This patch elimates below build warning: arch/arm/mach-omap2/usb-musb.c: In function 'usb_musb_init': arch/arm/mach-omap2/usb-musb.c:141: warning: 'dev' may be used uninitialized in this function Signed-off-by: Axel Lin <axel.lin@gmail.com> Bjarne Steinsbo <bsteinsbo@gmail.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-30ARM: OMAP: Fix i2c init for twl4030Tony Lindgren
Looks like 2600 kHz rate does not work reliably on 2430, so just use the 100 kHz rate. Otherwise the system often fails to boot properly with: omap_i2c omap_i2c.2: timeout waiting for bus ready omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages twl: clock init err [-110] omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages TWL4030 Unable to unlock IDCODE registers --110 Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-30ARM: OMAP4: MMC: fix power and audio issue, decouple USBC1 from MMC1Bryan Buckley
Remove OMAP4_USBC1_ICUSB_PWRDNZ_MASK during enable/disable PWRDNZ mode for MMC1_PBIAS and associated extended-drain MMC1 I/O cell. This is in accordance with the control module programming guide. This fixes a bug where if trying to use gpio_98 or gpio_99 and MMC1 at the same time the GPIO signal will be affected by a changing SDMMC1_VDDS. Software must keep MMC1_PBIAS cell and MMC1_IO cell PWRDNZ signals low whenever SDMMC1_VDDS ramps up/down or changes for cell protection purposes. MMC1 is based on SDMMC1_VDDS whereas USBC1 is based on SIM_VDDS therefore they can operate independently. Signed-off-by: Bryan Buckley <bryan.buckley@ti.com> Acked-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Tested-by: Balaji T K <balajitk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-26Merge branch 'samsung-fixes-3' of git://github.com/kgene/linux-samsungLinus Torvalds
* 'samsung-fixes-3' of git://github.com/kgene/linux-samsung: ARM: EXYNOS4: Rename sclk_cam clocks for FIMC driver ARM: S5PV210: Rename sclk_cam clocks for FIMC media driver ARM: S5P: fix incorrect loop iterator usage on gpio-interrupt ARM: S3C2443: Fix bit-reset in setrate of clk_armdiv
2011-09-27ARM: EXYNOS4: Rename sclk_cam clocks for FIMC driverSylwester Nawrocki
The sclk_cam clocks are now controlled by the top level FIMC media device driver bound to "s5p-fimc-md" platform device. Rename sclk_cam clocks so they accessible by the corresponding driver. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-09-27ARM: S5PV210: Rename sclk_cam clocks for FIMC media driverSylwester Nawrocki
The sclk_cam clocks are now controlled by the top level FIMC media device driver bound to "s5p-fimc-md" platform device. Rename sclk_cam clocks so they accessible by the corresponding driver. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-09-26Merge branch 'fixes' of ↵Linus Torvalds
http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_op ARM: dma-mapping: free allocated page if unable to map ARM: fix vmlinux.lds.S discarding sections ARM: nommu: fix warning with checksyscalls.sh ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed
2011-09-26ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_opWill Deacon
The SMP implementation of __futex_atomic_op clobbers oldval with the status flag from the exclusive store. This causes it to always read as zero when performing the FUTEX_OP_CMP_* operation. This patch updates the ARM __futex_atomic_op implementations to take a tmp argument, allowing us to store the strex status flag without overwriting the register containing oldval. Cc: stable@kernel.org Reported-by: Minho Ban <mhban@samsung.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-26ARM: dma-mapping: free allocated page if unable to mapRussell King
If the attempt to map a page for DMA fails (eg, because we're out of mapping space) then we must not hold on to the page we allocated for DMA - doing so will result in a memory leak. Cc: <stable@kernel.org> Reported-by: Bryan Phillippe <bp@darkforest.org> Tested-by: Bryan Phillippe <bp@darkforest.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-26Merge branch 'for_3_2/for-rmk/arm_cpu_pm' of ↵Russell King
git://gitorious.org/omap-sw-develoment/linux-omap-dev into devel-stable
2011-09-26ARM: S5P: fix incorrect loop iterator usage on gpio-interruptMarek Szyprowski
Loop iterator value after terminating list_for_each_entry() is not NULL. This patch fixes incorrect iterator usage in GPIO interrupt code for SAMSUNG S5P platforms. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-09-26ARM: S3C2443: Fix bit-reset in setrate of clk_armdivHeiko Stuebner
The changed statement should set the old armdiv bits to 0 and not everything else, before setting the new value. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-09-23ARM: mm: Add strongly ordered descriptor support.Santosh Shilimkar
On certain architectures, there might be a need to mark certain addresses with strongly ordered memory attributes to avoid ordering issues at the interconnect level. On OMAP4, the asynchronous bridge buffers can only be drained with strongly ordered accesses and hence the need to mark the memory strongly ordered. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Woodruff Richard <r-woodruff2@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
2011-09-23ARM: vfp: Fix the comment to make it consistent with the code.Santosh Shilimkar
Function vfp_force_reload() clears vfp_current_hw_state, so update the comment accordingly. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2011-09-23ARM: gic: Allow gic arch extensions to provide irqchip flagsColin Cross
Tegra can benefit from the IRQCHIP_MASK_ON_SUSPEND flag, allow it to be passed to the gic irq chip. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
2011-09-23ARM: vfp: Use cpu pm notifiers to save vfp stateColin Cross
When the cpu is powered down in a low power mode, the vfp registers may be reset. This patch uses CPU_PM_ENTER and CPU_PM_EXIT notifiers to save and restore the cpu's vfp registers. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
2011-09-23ARM: gic: Use cpu pm notifiers to save gic stateColin Cross
When the cpu is powered down in a low power mode, the gic cpu interface may be reset, and when the cpu cluster is powered down, the gic distributor may also be reset. This patch uses CPU_PM_ENTER and CPU_PM_EXIT notifiers to save and restore the gic cpu interface registers, and the CPU_CLUSTER_PM_ENTER and CPU_CLUSTER_PM_EXIT notifiers to save and restore the gic distributor registers. Original-author: Gary King <gking@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
2011-09-23ARM: Enable CPU_PM notifiers on ARM machines.Santosh Shilimkar
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
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