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-rw-r--r--arch/mips/sgi-ip27/Kconfig38
-rw-r--r--arch/mips/sgi-ip27/ip27-init.c4
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c61
4 files changed, 80 insertions, 25 deletions
diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig
index 7b0bc443724..f14ef38646d 100644
--- a/arch/mips/sgi-ip27/Kconfig
+++ b/arch/mips/sgi-ip27/Kconfig
@@ -4,31 +4,29 @@
# This options adds support for userspace processes upto 16TB size.
# Normally the limit is just .5TB.
-config SGI_SN0_N_MODE
- bool "IP27 N-Mode"
+choice
+ prompt "Node addressing mode"
depends on SGI_IP27
- help
- The nodes of Origin 200, Origin 2000 and Onyx 2 systems can be
- configured in either N-Modes which allows for more nodes or M-Mode
- which allows for more memory. Your system is most probably
- running in M-Mode, so you should say N here.
+ default SGI_SN_M_MODE
-config ARCH_DISCONTIGMEM_ENABLE
- bool
- default y if SGI_IP27
+config SGI_SN_M_MODE
+ bool "IP27 M-Mode"
help
- Say Y to upport efficient handling of discontiguous physical memory,
- for architectures which are either NUMA (Non-Uniform Memory Access)
- or have huge holes in the physical address space for other reasons.
- See <file:Documentation/vm/numa> for more.
+ The nodes of Origin, Onyx, Fuel and Tezro systems can be configured
+ in either N-Modes which allows for more nodes or M-Mode which allows
+ for more memory. Your hardware is almost certainly running in
+ M-Mode, so choose M-mode here.
-config NUMA
- bool "NUMA Support"
- depends on SGI_IP27
+config SGI_SN_N_MODE
+ bool "IP27 N-Mode"
+ depends on EXPERIMENTAL
help
- Say Y to compile the kernel to support NUMA (Non-Uniform Memory
- Access). This option is for configuring high-end multiprocessor
- server machines. If in doubt, say N.
+ The nodes of Origin, Onyx, Fuel and Tezro systems can be configured
+ in either N-Modes which allows for more nodes or M-Mode which allows
+ for more memory. Your hardware is almost certainly running in
+ M-Mode, so choose M-mode here.
+
+endchoice
config MAPPED_KERNEL
bool "Mapped kernel support"
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
index 8651a0e7540..a6b490e9970 100644
--- a/arch/mips/sgi-ip27/ip27-init.c
+++ b/arch/mips/sgi-ip27/ip27-init.c
@@ -196,7 +196,7 @@ extern void ip27_setup_console(void);
extern void ip27_time_init(void);
extern void ip27_reboot_setup(void);
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
{
hubreg_t p, e, n_mode;
nasid_t nid;
@@ -228,7 +228,7 @@ void __init plat_setup(void)
*/
n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK;
printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M');
-#ifdef CONFIG_SGI_SN0_N_MODE
+#ifdef CONFIG_SGI_SN_N_MODE
if (!n_mode)
panic("Kernel compiled for M mode.");
#else
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 2e643d2f51c..0b61a39ce2b 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -360,7 +360,7 @@ static struct hw_interrupt_type bridge_irq_type = {
static unsigned long irq_map[NR_IRQS / BITS_PER_LONG];
-static int allocate_irqno(void)
+int allocate_irqno(void)
{
int irq;
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 36b662e27b6..1fb860c7ac6 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -89,11 +89,13 @@ static int set_rtc_mmss(unsigned long nowtime)
}
#endif
+static unsigned int rt_timer_irq;
+
void ip27_rt_timer_interrupt(struct pt_regs *regs)
{
int cpu = smp_processor_id();
int cpuA = cputoslice(cpu) == 0;
- int irq = 9; /* XXX Assign number */
+ unsigned int irq = rt_timer_irq;
irq_enter();
write_seqlock(&xtime_lock);
@@ -179,13 +181,68 @@ static __init unsigned long get_m48t35_time(void)
return mktime(year, month, date, hour, min, sec);
}
+static void startup_rt_irq(unsigned int irq)
+{
+}
+
+static void shutdown_rt_irq(unsigned int irq)
+{
+}
+
+static void enable_rt_irq(unsigned int irq)
+{
+}
+
+static void disable_rt_irq(unsigned int irq)
+{
+}
+
+static void mask_and_ack_rt(unsigned int irq)
+{
+}
+
+static void end_rt_irq(unsigned int irq)
+{
+}
+
+static struct hw_interrupt_type rt_irq_type = {
+ .typename = "SN HUB RT timer",
+ .startup = startup_rt_irq,
+ .shutdown = shutdown_rt_irq,
+ .enable = enable_rt_irq,
+ .disable = disable_rt_irq,
+ .ack = mask_and_ack_rt,
+ .end = end_rt_irq,
+};
+
+static struct irqaction rt_irqaction = {
+ .handler = ip27_rt_timer_interrupt,
+ .flags = SA_INTERRUPT,
+ .mask = CPU_MASK_NONE,
+ .name = "timer"
+};
+
+extern int allocate_irqno(void);
+
static void ip27_timer_setup(struct irqaction *irq)
{
+ int irqno = allocate_irqno();
+
+ if (irqno < 0)
+ panic("Can't allocate interrupt number for timer interrupt");
+
+ irq_desc[irqno].status = IRQ_DISABLED;
+ irq_desc[irqno].action = NULL;
+ irq_desc[irqno].depth = 1;
+ irq_desc[irqno].handler = &rt_irq_type;
+
/* over-write the handler, we use our own way */
irq->handler = no_action;
/* setup irqaction */
-// setup_irq(IP27_TIMER_IRQ, irq); /* XXX Can't do this yet. */
+ irq_desc[irqno].status |= IRQ_PER_CPU;
+
+ rt_timer_irq = irqno;
}
void __init ip27_time_init(void)