diff options
Diffstat (limited to 'arch/arm/mach-s5p6440/include/mach')
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/debug-macro.S | 37 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/entry-macro.S | 16 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/gpio.h | 80 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/hardware.h | 18 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/io.h | 18 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/irqs.h | 111 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/map.h | 68 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/memory.h | 19 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/pwm-clock.h | 62 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/regs-clock.h | 130 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/regs-gpio.h | 54 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/regs-irq.h | 19 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/system.h | 26 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/tick.h | 24 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/timex.h | 24 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/uncompress.h | 24 | ||||
| -rw-r--r-- | arch/arm/mach-s5p6440/include/mach/vmalloc.h | 17 |
17 files changed, 747 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S new file mode 100644 index 00000000000..48cdb0da026 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/debug-macro.S @@ -0,0 +1,37 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/debug-macro.S + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* pull in the relevant register and map files. */ + +#include <mach/map.h> +#include <plat/regs-serial.h> + + /* note, for the boot process to work we have to keep the UART + * virtual address aligned to an 1MiB boundary for the L1 + * mapping the head code makes. We keep the UART virtual address + * aligned and add in the offset when we load the value here. + */ + + .macro addruart, rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 + ldreq \rx, = S3C_PA_UART + ldrne \rx, = S3C_VA_UART +#if CONFIG_DEBUG_S3C_UART != 0 + add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) +#endif + .endm + +/* include the reset of the code which will do the work, we're only + * compiling for a single cpu processor type so the default of s3c2440 + * will be fine with us. + */ + +#include <plat/debug-macro.S> diff --git a/arch/arm/mach-s5p6440/include/mach/entry-macro.S b/arch/arm/mach-s5p6440/include/mach/entry-macro.S new file mode 100644 index 00000000000..e65f1b96726 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/entry-macro.S @@ -0,0 +1,16 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/entry-macro.S + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Low-level IRQ helper macros for the Samsung S5P6440 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <mach/map.h> +#include <plat/irqs.h> + +#include <asm/entry-macro-vic2.S> diff --git a/arch/arm/mach-s5p6440/include/mach/gpio.h b/arch/arm/mach-s5p6440/include/mach/gpio.h new file mode 100644 index 00000000000..21783834f2a --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/gpio.h @@ -0,0 +1,80 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/gpio.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - GPIO lib support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_GPIO_H +#define __ASM_ARCH_GPIO_H __FILE__ + +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value +#define gpio_cansleep __gpio_cansleep +#define gpio_to_irq __gpio_to_irq + +/* GPIO bank sizes */ +#define S5P6440_GPIO_A_NR (6) +#define S5P6440_GPIO_B_NR (7) +#define S5P6440_GPIO_C_NR (8) +#define S5P6440_GPIO_F_NR (2) +#define S5P6440_GPIO_G_NR (7) +#define S5P6440_GPIO_H_NR (10) +#define S5P6440_GPIO_I_NR (16) +#define S5P6440_GPIO_J_NR (12) +#define S5P6440_GPIO_N_NR (16) +#define S5P6440_GPIO_P_NR (8) +#define S5P6440_GPIO_R_NR (15) + +/* GPIO bank numbers */ + +/* CONFIG_S3C_GPIO_SPACE allows the user to select extra + * space for debugging purposes so that any accidental + * change from one gpio bank to another can be caught. +*/ +#define S5P6440_GPIO_NEXT(__gpio) \ + ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) + +enum s5p_gpio_number { + S5P6440_GPIO_A_START = 0, + S5P6440_GPIO_B_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_A), + S5P6440_GPIO_C_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_B), + S5P6440_GPIO_F_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_C), + S5P6440_GPIO_G_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_F), + S5P6440_GPIO_H_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_G), + S5P6440_GPIO_I_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_H), + S5P6440_GPIO_J_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_I), + S5P6440_GPIO_N_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_J), + S5P6440_GPIO_P_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_N), + S5P6440_GPIO_R_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_P), +}; + +/* S5P6440 GPIO number definitions. */ +#define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr)) +#define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr)) +#define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr)) +#define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr)) +#define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr)) +#define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr)) +#define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr)) +#define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr)) +#define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr)) +#define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr)) +#define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr)) + +/* the end of the S5P6440 specific gpios */ +#define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1) +#define S3C_GPIO_END S5P6440_GPIO_END + +/* define the number of gpios we need to the one after the GPR() range */ +#define ARCH_NR_GPIOS (S5P6440_GPR(S5P6440_GPIO_R_NR) + \ + CONFIG_SAMSUNG_GPIO_EXTRA + 1) + +#include <asm-generic/gpio.h> + +#endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/hardware.h b/arch/arm/mach-s5p6440/include/mach/hardware.h new file mode 100644 index 00000000000..be8b26e875d --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/hardware.h @@ -0,0 +1,18 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/hardware.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - Hardware support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H __FILE__ + +/* currently nothing here, placeholder */ + +#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/io.h b/arch/arm/mach-s5p6440/include/mach/io.h new file mode 100644 index 00000000000..fa2d69cb1ad --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/io.h @@ -0,0 +1,18 @@ +/* arch/arm/mach-s5p6440/include/mach/io.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben-linux@fluff.org> + * + * Default IO routines for S3C64XX based + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +/* No current ISA/PCI bus support. */ +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) + +#define IO_SPACE_LIMIT (0xFFFFFFFF) + +#endif diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p6440/include/mach/irqs.h new file mode 100644 index 00000000000..a4b9b40d18f --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/irqs.h @@ -0,0 +1,111 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/irqs.h + * + * Copyright 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - IRQ definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_S5P_IRQS_H +#define __ASM_ARCH_S5P_IRQS_H __FILE__ + +#include <plat/irqs.h> + +/* VIC0 */ + +#define IRQ_EINT0_3 S5P_IRQ_VIC0(0) +#define IRQ_EINT4_11 S5P_IRQ_VIC0(1) +#define IRQ_RTC_TIC S5P_IRQ_VIC0(2) +#define IRQ_IIC1 S5P_IRQ_VIC0(5) +#define IRQ_I2SV40 S5P_IRQ_VIC0(6) +#define IRQ_GPS S5P_IRQ_VIC0(7) +#define IRQ_POST0 S5P_IRQ_VIC0(9) +#define IRQ_2D S5P_IRQ_VIC0(11) +#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(23) +#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(24) +#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(25) +#define IRQ_WDT S5P_IRQ_VIC0(26) +#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(27) +#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(28) +#define IRQ_DISPCON0 S5P_IRQ_VIC0(29) +#define IRQ_DISPCON1 S5P_IRQ_VIC0(30) +#define IRQ_DISPCON2 S5P_IRQ_VIC0(31) + +/* VIC1 */ + +#define IRQ_EINT12_15 S5P_IRQ_VIC1(0) +#define IRQ_PCM0 S5P_IRQ_VIC1(2) +#define IRQ_UART0 S5P_IRQ_VIC1(5) +#define IRQ_UART1 S5P_IRQ_VIC1(6) +#define IRQ_UART2 S5P_IRQ_VIC1(7) +#define IRQ_UART3 S5P_IRQ_VIC1(8) +#define IRQ_DMA0 S5P_IRQ_VIC1(9) +#define IRQ_NFC S5P_IRQ_VIC1(13) +#define IRQ_SPI0 S5P_IRQ_VIC1(16) +#define IRQ_SPI1 S5P_IRQ_VIC1(17) +#define IRQ_IIC S5P_IRQ_VIC1(18) +#define IRQ_DISPCON3 S5P_IRQ_VIC1(19) +#define IRQ_FIMGVG S5P_IRQ_VIC1(20) +#define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21) +#define IRQ_PMUIRQ S5P_IRQ_VIC1(23) +#define IRQ_HSMMC0 S5P_IRQ_VIC1(24) +#define IRQ_HSMMC1 S5P_IRQ_VIC1(25) +#define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */ +#define IRQ_OTG S5P_IRQ_VIC1(26) +#define IRQ_DSI S5P_IRQ_VIC1(27) +#define IRQ_RTC_ALARM S5P_IRQ_VIC1(28) +#define IRQ_TSI S5P_IRQ_VIC1(29) +#define IRQ_PENDN S5P_IRQ_VIC1(30) +#define IRQ_TC IRQ_PENDN +#define IRQ_ADC S5P_IRQ_VIC1(31) + +/* + * Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined + * them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place + * after the pair of VICs. + */ + +#define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6) + +#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) +#define IRQ_EINT(x) S5P_EINT(x) + +/* + * Next the external interrupt groups. These are similar to the IRQ_EINT(x) + * that they are sourced from the GPIO pins but with a different scheme for + * priority and source indication. + * + * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO + * interrupts, but for historical reasons they are kept apart from these + * next interrupts. + * + * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the + * machine specific support files. + */ + +/* Actually, #6 and #7 are missing in the EINT_GROUP1 */ +#define IRQ_EINT_GROUP1_NR (15) +#define IRQ_EINT_GROUP2_NR (8) +#define IRQ_EINT_GROUP5_NR (7) +#define IRQ_EINT_GROUP6_NR (10) +/* Actually, #0, #1 and #2 are missing in the EINT_GROUP8 */ +#define IRQ_EINT_GROUP8_NR (11) + +#define IRQ_EINT_GROUP_BASE S5P_EINT(16) +#define IRQ_EINT_GROUP1_BASE (IRQ_EINT_GROUP_BASE + 0) +#define IRQ_EINT_GROUP2_BASE (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR) +#define IRQ_EINT_GROUP5_BASE (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR) +#define IRQ_EINT_GROUP6_BASE (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR) +#define IRQ_EINT_GROUP8_BASE (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR) + +#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x)) + +/* Set the default NR_IRQS */ + +#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1) + +#endif /* __ASM_ARCH_S5P_IRQS_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h new file mode 100644 index 00000000000..8924e5a4d6a --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/map.h @@ -0,0 +1,68 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/map.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MAP_H +#define __ASM_ARCH_MAP_H __FILE__ + +#include <plat/map-base.h> +#include <plat/map-s5p.h> + +#define S5P6440_PA_CHIPID (0xE0000000) +#define S5P_PA_CHIPID S5P6440_PA_CHIPID + +#define S5P6440_PA_SYSCON (0xE0100000) +#define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0) +#define S5P_PA_SYSCON S5P6440_PA_SYSCON + +#define S5P6440_PA_GPIO (0xE0308000) +#define S5P_PA_GPIO S5P6440_PA_GPIO + +#define S5P6440_PA_VIC0 (0xE4000000) +#define S5P_PA_VIC0 S5P6440_PA_VIC0 + +#define S5P6440_PA_VIC1 (0xE4100000) +#define S5P_PA_VIC1 S5P6440_PA_VIC1 + +#define S5P6440_PA_TIMER (0xEA000000) +#define S5P_PA_TIMER S5P6440_PA_TIMER + +#define S5P6440_PA_RTC (0xEA100000) +#define S5P_PA_RTC S5P6440_PA_RTC + +#define S5P6440_PA_WDT (0xEA200000) +#define S5P_PA_WDT S5P6440_PA_WDT + +#define S5P6440_PA_UART (0xEC000000) + +#define S5P_PA_UART0 (S5P6440_PA_UART + 0x0) +#define S5P_PA_UART1 (S5P6440_PA_UART + 0x400) +#define S5P_PA_UART2 (S5P6440_PA_UART + 0x800) +#define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00) + +#define S5P_SZ_UART SZ_256 + +#define S5P6440_PA_IIC0 (0xEC104000) + +#define S5P6440_PA_HSOTG (0xED100000) + +#define S5P6440_PA_HSMMC0 (0xED800000) +#define S5P6440_PA_HSMMC1 (0xED900000) +#define S5P6440_PA_HSMMC2 (0xEDA00000) + +#define S5P6440_PA_SDRAM (0x20000000) +#define S5P_PA_SDRAM S5P6440_PA_SDRAM + +/* compatibiltiy defines. */ +#define S3C_PA_UART S5P6440_PA_UART +#define S3C_PA_IIC S5P6440_PA_IIC0 + +#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/memory.h b/arch/arm/mach-s5p6440/include/mach/memory.h new file mode 100644 index 00000000000..d62910c71b5 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/memory.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/memory.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - Memory definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PHYS_OFFSET UL(0x20000000) +#define CONSISTENT_DMA_SIZE SZ_8M + +#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h new file mode 100644 index 00000000000..c4bb7c55547 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h @@ -0,0 +1,62 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * Copyright 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - pwm clock and timer support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/** + * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk + * @cfg: The timer TCFG1 register bits shifted down to 0. + * + * Return true if the given configuration from TCFG1 is a TCLK instead + * any of the TDIV clocks. + */ +static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) +{ + return tcfg == S3C2410_TCFG1_MUX_TCLK; +} + +/** + * tcfg_to_divisor() - convert tcfg1 setting to a divisor + * @tcfg1: The tcfg1 setting, shifted down. + * + * Get the divisor value for the given tcfg1 setting. We assume the + * caller has already checked to see if this is not a TCLK source. + */ +static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) +{ + return 1 << (1 + tcfg1); +} + +/** + * pwm_tdiv_has_div1() - does the tdiv setting have a /1 + * + * Return true if we have a /1 in the tdiv setting. + */ +static inline unsigned int pwm_tdiv_has_div1(void) +{ + return 0; +} + +/** + * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. + * @div: The divisor to calculate the bit information for. + * + * Turn a divisor into the necessary bit field for TCFG1. + */ +static inline unsigned long pwm_tdiv_div_bits(unsigned int div) +{ + return ilog2(div) - 1; +} + +#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h new file mode 100644 index 00000000000..c783ecc9f19 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/regs-clock.h @@ -0,0 +1,130 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/regs-clock.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - Clock register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_CLOCK_H +#define __ASM_ARCH_REGS_CLOCK_H __FILE__ + +#include <mach/map.h> + +#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) + +#define S5P_APLL_LOCK S5P_CLKREG(0x00) +#define S5P_MPLL_LOCK S5P_CLKREG(0x04) +#define S5P_EPLL_LOCK S5P_CLKREG(0x08) +#define S5P_APLL_CON S5P_CLKREG(0x0C) +#define S5P_MPLL_CON S5P_CLKREG(0x10) +#define S5P_EPLL_CON S5P_CLKREG(0x14) +#define S5P_EPLL_CON_K S5P_CLKREG(0x18) +#define S5P_CLK_SRC0 S5P_CLKREG(0x1C) +#define S5P_CLK_DIV0 S5P_CLKREG(0x20) +#define S5P_CLK_DIV1 S5P_CLKREG(0x24) +#define S5P_CLK_DIV2 S5P_CLKREG(0x28) +#define S5P_CLK_OUT S5P_CLKREG(0x2C) +#define S5P_CLK_GATE_HCLK0 S5P_CLKREG(0x30) +#define S5P_CLK_GATE_PCLK S5P_CLKREG(0x34) +#define S5P_CLK_GATE_SCLK0 S5P_CLKREG(0x38) +#define S5P_CLK_GATE_MEM0 S5P_CLKREG(0x3C) +#define S5P_CLK_DIV3 S5P_CLKREG(0x40) +#define S5P_CLK_GATE_HCLK1 S5P_CLKREG(0x44) +#define S5P_CLK_GATE_SCLK1 S5P_CLKREG(0x48) +#define S5P_AHB_CON0 S5P_CLKREG(0x100) +#define S5P_CLK_SRC1 S5P_CLKREG(0x10C) +#define S5P_SWRESET S5P_CLKREG(0x114) +#define S5P_SYS_ID S5P_CLKREG(0x118) +#define S5P_SYS_OTHERS S5P_CLKREG(0x11C) +#define S5P_MEM_CFG_STAT S5P_CLKREG(0x12C) +#define S5P_PWR_CFG S5P_CLKREG(0x804) +#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0x808) +#define S5P_NORMAL_CFG S5P_CLKREG(0x810) +#define S5P_STOP_CFG S5P_CLKREG(0x814) +#define S5P_SLEEP_CFG S5P_CLKREG(0x818) +#define S5P_OSC_FREQ S5P_CLKREG(0x820) +#define S5P_OSC_STABLE S5P_CLKREG(0x824) +#define S5P_PWR_STABLE S5P_CLKREG(0x828) +#define S5P_MTC_STABLE S5P_CLKREG(0x830) +#define S5P_OTHERS S5P_CLKREG(0x900) +#define S5P_RST_STAT S5P_CLKREG(0x904) +#define S5P_WAKEUP_STAT S5P_CLKREG(0x908) +#define S5P_SLPEN S5P_CLKREG(0x930) +#define S5P_INFORM0 S5P_CLKREG(0xA00) +#define S5P_INFORM1 S5P_CLKREG(0xA04) +#define S5P_INFORM2 S5P_CLKREG(0xA08) +#define S5P_INFORM3 S5P_CLKREG(0xA0C) + +/* CLKDIV0 */ +#define S5P_CLKDIV0_PCLK_MASK (0xf << 12) +#define S5P_CLKDIV0_PCLK_SHIFT (12) +#define S5P_CLKDIV0_HCLK_MASK (0xf << 8) +#define S5P_CLKDIV0_HCLK_SHIFT (8) +#define S5P_CLKDIV0_MPLL_MASK (0x1 << 4) +#define S5P_CLKDIV0_ARM_MASK (0xf << 0) +#define S5P_CLKDIV0_ARM_SHIFT (0) + +/* CLKDIV3 */ +#define S5P_CLKDIV3_PCLK_LOW_MASK (0xf << 12) +#define S5P_CLKDIV3_PCLK_LOW_SHIFT (12) +#define S5P_CLKDIV3_HCLK_LOW_MASK (0xf << 8) +#define S5P_CLKDIV3_HCLK_LOW_SHIFT (8) + +/* HCLK0 GATE Registers */ +#define S5P_CLKCON_HCLK0_USB (1<<20) +#define S5P_CLKCON_HCLK0_HSMMC2 (1<<19) +#define S5P_CLKCON_HCLK0_HSMMC1 (1<<18) +#define S5P_CLKCON_HCLK0_HSMMC0 (1<<17) +#define S5P_CLKCON_HCLK0_POST0 (1<<5) + +/* HCLK1 GATE Registers */ +#define S5P_CLKCON_HCLK1_DISPCON (1<<1) + +/* PCLK GATE Registers */ +#define S5P_CLKCON_PCLK_IIS2 (1<<26) +#define S5P_CLKCON_PCLK_SPI1 (1<<22) +#define S5P_CLKCON_PCLK_SPI0 (1<<21) +#define S5P_CLKCON_PCLK_GPIO (1<<18) +#define S5P_CLKCON_PCLK_IIC0 (1<<17) +#define S5P_CLKCON_PCLK_TSADC (1<<12) +#define S5P_CLKCON_PCLK_PWM (1<<7) +#define S5P_CLKCON_PCLK_RTC (1<<6) +#define S5P_CLKCON_PCLK_WDT (1<<5) +#define S5P_CLKCON_PCLK_UART3 (1<<4) +#define S5P_CLKCON_PCLK_UART2 (1<<3) +#define S5P_CLKCON_PCLK_UART1 (1<<2) +#define S5P_CLKCON_PCLK_UART0 (1<<1) + +/* SCLK0 GATE Registers */ +#define S5P_CLKCON_SCLK0_MMC2_48 (1<<29) +#define S5P_CLKCON_SCLK0_MMC1_48 (1<<28) +#define S5P_CLKCON_SCLK0_MMC0_48 (1<<27) +#define S5P_CLKCON_SCLK0_MMC2 (1<<26) +#define S5P_CLKCON_SCLK0_MMC1 (1<<25) +#define S5P_CLKCON_SCLK0_MMC0 (1<<24) +#define S5P_CLKCON_SCLK0_SPI1_48 (1<<23) +#define S5P_CLKCON_SCLK0_SPI0_48 (1<<22) +#define S5P_CLKCON_SCLK0_SPI1 (1<<21) +#define S5P_CLKCON_SCLK0_SPI0 (1<<20) +#define S5P_CLKCON_SCLK0_UART (1<<5) + +/* SCLK1 GATE Registers */ + +/* MEM0 GATE Registers */ +#define S5P_CLKCON_MEM0_HCLK_NFCON (1<<2) + +/*OTHERS Resgister */ +#define S5P_OTHERS_USB_SIG_MASK (1<<16) +#define S5P_OTHERS_HCLK_LOW_SEL_MPLL (1<<6) + +/* Compatibility defines */ +#define ARM_CLK_DIV S5P_CLK_DIV0 +#define ARM_DIV_RATIO_SHIFT 0 +#define ARM_DIV_MASK (0xf << ARM_DIV_RATIO_SHIFT) + +#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h new file mode 100644 index 00000000000..82ff753913d --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h @@ -0,0 +1,54 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/regs-gpio.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - GPIO register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_REGS_GPIO_H +#define __ASM_ARCH_REGS_GPIO_H __FILE__ + +#include <mach/map.h> + +/* Base addresses for each of the banks */ +#define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000) +#define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020) +#define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040) +#define S5P6440_GPF_BASE (S5P_VA_GPIO + 0x00A0) +#define S5P6440_GPG_BASE (S5P_VA_GPIO + 0x00C0) +#define S5P6440_GPH_BASE (S5P_VA_GPIO + 0x00E0) +#define S5P6440_GPI_BASE (S5P_VA_GPIO + 0x0100) +#define S5P6440_GPJ_BASE (S5P_VA_GPIO + 0x0120) +#define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830) +#define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160) +#define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290) +#define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900) +#define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910) +#define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914) +#define S5P6440_EINT0MASK (S5P_VA_GPIO + 0x920) +#define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924) + +/* for LCD */ +#define S5P6440_SPCON_LCD_SEL_RGB (1 << 0) +#define S5P6440_SPCON_LCD_SEL_MASK (3 << 0) + +/* These set of macros are not really useful for the + * GPF/GPI/GPJ/GPN/GPP, + * useful for others set of GPIO's (4 bit) + */ +#define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4)) +#define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4)) +#define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) + +/* Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit) + * */ +#define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) +#define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2)) +#define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) + +#endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/regs-irq.h b/arch/arm/mach-s5p6440/include/mach/regs-irq.h new file mode 100644 index 00000000000..a961f4beeb0 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/regs-irq.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/regs-irq.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - IRQ register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_IRQ_H +#define __ASM_ARCH_REGS_IRQ_H __FILE__ + +#include <asm/hardware/vic.h> +#include <mach/map.h> + +#endif /* __ASM_ARCH_REGS_IRQ_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/system.h b/arch/arm/mach-s5p6440/include/mach/system.h new file mode 100644 index 00000000000..d2dd817da66 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/system.h @@ -0,0 +1,26 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/system.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +static void arch_reset(char mode, const char *cmd) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p6440/include/mach/tick.h new file mode 100644 index 00000000000..2f25c7f0797 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/tick.h @@ -0,0 +1,24 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/tick.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - Timer tick support definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TICK_H +#define __ASM_ARCH_TICK_H __FILE__ + +static inline u32 s3c24xx_ostimer_pending(void) +{ + u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); + return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); +} + +#define TICK_MAX (0xffffffff) + +#endif /* __ASM_ARCH_TICK_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/timex.h b/arch/arm/mach-s5p6440/include/mach/timex.h new file mode 100644 index 00000000000..fb2e8cd4082 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/timex.h @@ -0,0 +1,24 @@ +/* arch/arm/mach-s3c64xx/include/mach/timex.h + * + * Copyright (c) 2003-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C6400 - time parameters + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H + +/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it + * a variable is useless. It seems as long as we make our timers an + * exact multiple of HZ, any value that makes a 1->1 correspondence + * for the time conversion functions to/from jiffies is acceptable. +*/ + +#define CLOCK_TICK_RATE 12000000 + +#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/uncompress.h b/arch/arm/mach-s5p6440/include/mach/uncompress.h new file mode 100644 index 00000000000..7c1f600d65c --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/uncompress.h @@ -0,0 +1,24 @@ +/* linux/arch/arm/mach-s5p6440/include/mach/uncompress.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6440 - uncompress code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include <mach/map.h> +#include <plat/uncompress.h> + +static void arch_detect_cpu(void) +{ + /* we do not need to do any cpu detection here at the moment. */ +} + +#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p6440/include/mach/vmalloc.h new file mode 100644 index 00000000000..16df257b1dc --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/vmalloc.h @@ -0,0 +1,17 @@ +/* arch/arm/mach-s5p6440/include/mach/vmalloc.h + * + * Copyright 2010 Ben Dooks <ben-linux@fluff.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C6400 vmalloc definition +*/ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H + +#define VMALLOC_END (0xE0000000) + +#endif /* __ASM_ARCH_VMALLOC_H */ |