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authorRalf Baechle <ralf@linux-mips.org>2007-09-03 16:22:26 +0200
committerRalf Baechle <ralf@linux-mips.org>2007-09-10 21:25:28 +0100
commit7b0fdaa6a193e0b07d9f72e942f51ce25d9e0387 (patch)
tree5a930850752154a0a9e4b4458f67b04e756bf744 /include
parent2e4dafd5d169ea2d5b066e38b5f8f9e416dc9eaa (diff)
downloadlinux-linaro-7b0fdaa6a193e0b07d9f72e942f51ce25d9e0387.tar.gz
[MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.
Following a strict interpretation the empty definition of irq_enable_hazard has always been a bug - but an intentional one because it didn't bite. This has now changed, for uniprocessor kernels mm/slab.c:do_drain() [...] on_each_cpu(do_drain, cachep, 1, 1); check_irq_on(); [...] may be compiled into a mtc0 c0_status; mfc0 c0_status sequence resulting in a back-to-back hazard. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/hazards.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 918a4894b58..6a5fa32f615 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -172,6 +172,7 @@ ASMMACRO(tlb_probe_hazard,
nop; nop; nop
)
ASMMACRO(irq_enable_hazard,
+ _ssnop; _ssnop; _ssnop;
)
ASMMACRO(irq_disable_hazard,
nop; nop; nop