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authorHirokazu Takata <takata@linux-m32r.org>2007-08-20 20:53:50 +0900
committerHirokazu Takata <takata@linux-m32r.org>2007-09-06 11:10:56 +0900
commit7071b2914a540b43dfcad17f6892a8c115799d50 (patch)
treeeeb059350e481a1cfab731cf1c7dc2dbb2743532 /include
parent33205613cd603fa4d80bb81464e60b909b7047e1 (diff)
downloadlinux-linaro-7071b2914a540b43dfcad17f6892a8c115799d50.tar.gz
m32r: Rename STI/CLI macros
The names of STI and CLI macros were derived from i386 arch historically, but their name are incomprehensible. So, for easy to understand, rename these macros to ENABLE_INTERRUPTS and DISABLE_INTERRUPTS, respectively. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-m32r/assembler.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/include/asm-m32r/assembler.h b/include/asm-m32r/assembler.h
index 47041d19d4a..26351539b5f 100644
--- a/include/asm-m32r/assembler.h
+++ b/include/asm-m32r/assembler.h
@@ -52,27 +52,27 @@
.endm
#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
-#define STI(reg) STI_M reg
- .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+ .macro ENABLE_INTERRUPTS reg
setpsw #0x40 -> nop
; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
.endm
-#define CLI(reg) CLI_M reg
- .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+ .macro DISABLE_INTERRUPTS reg
clrpsw #0x40 -> nop
; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
.endm
#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
-#define STI(reg) STI_M reg
- .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+ .macro ENABLE_INTERRUPTS reg
mvfc \reg, psw
or3 \reg, \reg, #0x0040
mvtc \reg, psw
.endm
-#define CLI(reg) CLI_M reg
- .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+ .macro DISABLE_INTERRUPTS reg
mvfc \reg, psw
and3 \reg, \reg, #0xffbf
mvtc \reg, psw