diff options
| author | Tony Lin <tony.lin@freescale.com> | 2011-10-28 13:52:45 +0800 |
|---|---|---|
| committer | Eric Miao <eric.miao@canonical.com> | 2011-11-10 07:38:54 +0800 |
| commit | 1d5236ed1c16e769de8fb994d8c3c13f451a61e2 (patch) | |
| tree | f6fbab4b0b747d3463580e29b70df8136d59c921 /drivers | |
| parent | 8b8ad8cea177f890f078de8724ea183be838377f (diff) | |
ENGR00160940-2 [MX6Q]sdhci: add delay line configuration
driver will configure the delay line setting due to board data
after DDR mode is enabled.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 5c6d8f58bcf..e68884c849e 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -37,6 +37,10 @@ #define SDHCI_MIX_CTRL_AUTO_TUNE (1 << 24) #define SDHCI_MIX_CTRL_FBCLK_SEL (1 << 25) +#define SDHCI_DLL_CTRL 0x60 +#define SDHCI_DLL_OVERRIDE_OFFSET 0x9 +#define SDHCI_DLL_OVERRIDE_EN_OFFSET 0x8 + #define SDHCI_TUNE_CTRL_STATUS 0x68 #define SDHCI_TUNE_CTRL_STEP 0x1 #define SDHCI_TUNE_CTRL_MIN 0x0 @@ -57,6 +61,7 @@ #define SDHCI_PROT_CTRL_8BIT (2 << 1) #define SDHCI_PROT_CTRL_4BIT (1 << 1) #define SDHCI_PROT_CTRL_1BIT (0 << 1) + /* * The CMDTYPE of the CMD register (offset 0xE) should be set to * "11" when the STOP CMD12 is issued on imx53 to abort one @@ -331,6 +336,8 @@ static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host) static int plt_ddr_mode(struct sdhci_host *host, int mode) { u32 reg = sdhci_readl(host, SDHCI_MIX_CTRL); + struct esdhc_platform_data *boarddata = + host->mmc->parent->platform_data; if (mode == MMC_1_8V_DDR_MODE) reg |= SDHCI_MIX_CTRL_DDREN; @@ -342,6 +349,17 @@ static int plt_ddr_mode(struct sdhci_host *host, int mode) /* set clock frequency again */ esdhc_set_clock(host, host->clock); + /* delay line setting */ + if (!boarddata->delay_line) + return 0; + + if (mode == MMC_1_8V_DDR_MODE) + sdhci_writel(host, + (boarddata->delay_line << SDHCI_DLL_OVERRIDE_OFFSET) | + (1 << SDHCI_DLL_OVERRIDE_EN_OFFSET), SDHCI_DLL_CTRL); + else + sdhci_writel(host, 0, SDHCI_DLL_CTRL); + return 0; } |