diff options
| author | Zhou Jingyu <b02241@freescale.com> | 2010-03-26 14:52:10 +0800 |
|---|---|---|
| committer | Zhou Jingyu <b02241@freescale.com> | 2010-03-26 15:42:21 +0800 |
| commit | b29c1776959bf4e763be8f6f328dc45a60859c72 (patch) | |
| tree | 93876b23f8bcc649e85cc69ff797f7536f27fea2 /drivers/power/mxs/ddi_power_battery.c | |
| parent | 9d15f10eb2db4670ef97915e950c18cf227e0343 (diff) | |
ENGR00122040 mxs battery driver: fix lradc conflict
use configurable lraadc channel for tempreture
increase conditioning current
fix build warnings
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
Diffstat (limited to 'drivers/power/mxs/ddi_power_battery.c')
| -rw-r--r-- | drivers/power/mxs/ddi_power_battery.c | 39 |
1 files changed, 21 insertions, 18 deletions
diff --git a/drivers/power/mxs/ddi_power_battery.c b/drivers/power/mxs/ddi_power_battery.c index 9660ab6f671..c17b2da86ff 100644 --- a/drivers/power/mxs/ddi_power_battery.c +++ b/drivers/power/mxs/ddi_power_battery.c @@ -965,73 +965,76 @@ int ddi_power_init_battery(void) } /* - * Use the the lradc1 channel + * Use the the lradc channel * get the die temperature from on-chip sensor. */ uint16_t MeasureInternalDieTemperature(void) { - uint32_t ch8Value, ch9Value; + uint32_t ch8Value, ch9Value, lradc_irq_mask, channel; + + channel = g_ddi_bc_Configuration.u8BatteryTempChannel; + lradc_irq_mask = 1 << channel; /* power up internal tep sensor block */ __raw_writel(BM_LRADC_CTRL2_TEMPSENSE_PWD, REGS_LRADC_BASE + HW_LRADC_CTRL2_CLR); /* mux to the lradc 8th temp channel */ - __raw_writel(BF_LRADC_CTRL4_LRADC1SELECT(0xF), + __raw_writel((0xF << (4 * channel)), REGS_LRADC_BASE + HW_LRADC_CTRL4_CLR); - __raw_writel(BF_LRADC_CTRL4_LRADC1SELECT(8), + __raw_writel((8 << (4 * channel)), REGS_LRADC_BASE + HW_LRADC_CTRL4_SET); /* Clear the interrupt flag */ - __raw_writel(BM_LRADC_CTRL1_LRADC1_IRQ, + __raw_writel(lradc_irq_mask, REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); - __raw_writel(BF_LRADC_CTRL0_SCHEDULE(1 << LRADC_CH1), + __raw_writel(BF_LRADC_CTRL0_SCHEDULE(1 << channel), REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); /* Wait for conversion complete*/ while (!(__raw_readl(REGS_LRADC_BASE + HW_LRADC_CTRL1) - & BM_LRADC_CTRL1_LRADC1_IRQ)) + & lradc_irq_mask)) cpu_relax(); /* Clear the interrupt flag again */ - __raw_writel(BM_LRADC_CTRL1_LRADC1_IRQ, + __raw_writel(lradc_irq_mask, REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); /* read temperature value and clr lradc */ ch8Value = __raw_readl(REGS_LRADC_BASE + - HW_LRADC_CHn(LRADC_CH1)) & BM_LRADC_CHn_VALUE; + HW_LRADC_CHn(channel)) & BM_LRADC_CHn_VALUE; __raw_writel(BM_LRADC_CHn_VALUE, - REGS_LRADC_BASE + HW_LRADC_CHn_CLR(LRADC_CH1)); + REGS_LRADC_BASE + HW_LRADC_CHn_CLR(channel)); /* mux to the lradc 9th temp channel */ - __raw_writel(BF_LRADC_CTRL4_LRADC1SELECT(0xF), + __raw_writel((0xF << (4 * channel)), REGS_LRADC_BASE + HW_LRADC_CTRL4_CLR); - __raw_writel(BF_LRADC_CTRL4_LRADC1SELECT(9), + __raw_writel((9 << (4 * channel)), REGS_LRADC_BASE + HW_LRADC_CTRL4_SET); /* Clear the interrupt flag */ - __raw_writel(BM_LRADC_CTRL1_LRADC1_IRQ, + __raw_writel(lradc_irq_mask, REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); - __raw_writel(BF_LRADC_CTRL0_SCHEDULE(1 << LRADC_CH1), + __raw_writel(BF_LRADC_CTRL0_SCHEDULE(1 << channel), REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); /* Wait for conversion complete */ while (!(__raw_readl(REGS_LRADC_BASE + HW_LRADC_CTRL1) - & BM_LRADC_CTRL1_LRADC1_IRQ)) + & lradc_irq_mask)) cpu_relax(); /* Clear the interrupt flag */ - __raw_writel(BM_LRADC_CTRL1_LRADC1_IRQ, + __raw_writel(lradc_irq_mask, REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); /* read temperature value */ ch9Value = __raw_readl( - REGS_LRADC_BASE + HW_LRADC_CHn(LRADC_CH1)) + REGS_LRADC_BASE + HW_LRADC_CHn(channel)) & BM_LRADC_CHn_VALUE; __raw_writel(BM_LRADC_CHn_VALUE, - REGS_LRADC_BASE + HW_LRADC_CHn_CLR(LRADC_CH1)); + REGS_LRADC_BASE + HW_LRADC_CHn_CLR(channel)); /* power down temp sensor block */ __raw_writel(BM_LRADC_CTRL2_TEMPSENSE_PWD, |