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authorAustin Zhang <austin.zhang@intel.com>2008-08-07 09:57:03 +0800
committerHerbert Xu <herbert@gondor.apana.org.au>2008-08-29 15:49:50 +1000
commit8cb51ba8e06570a5fff674b3744d12a1b089f2d0 (patch)
treecb46d2598a22aeffb68827b1d09fe4cb1dcd7612 /crypto
parentf139cfa7cdccd0b315fad098889897b5fcd389b0 (diff)
downloadlinux-linaro-8cb51ba8e06570a5fff674b3744d12a1b089f2d0.tar.gz
crypto: crc32c - Use Intel CRC32 instruction
From NHM processor onward, Intel processors can support hardware accelerated CRC32c algorithm with the new CRC32 instruction in SSE 4.2 instruction set. The patch detects the availability of the feature, and chooses the most proper way to calculate CRC32c checksum. Byte code instructions are used for compiler compatibility. No MMX / XMM registers is involved in the implementation. Signed-off-by: Austin Zhang <austin.zhang@intel.com> Signed-off-by: Kent Liu <kent.liu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'crypto')
-rw-r--r--crypto/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 4f72b308606..797b9e15d72 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -221,6 +221,18 @@ config CRYPTO_CRC32C
See Castagnoli93. This implementation uses lib/libcrc32c.
Module will be crc32c.
+config CRYPTO_CRC32C_INTEL
+ tristate "CRC32c INTEL hardware acceleration"
+ depends on X86
+ select CRYPTO_HASH
+ help
+ In Intel processor with SSE4.2 supported, the processor will
+ support CRC32C implementation using hardware accelerated CRC32
+ instruction. This option will create 'crc32c-intel' module,
+ which will enable any routine to use the CRC32 instruction to
+ gain performance compared with software implementation.
+ Module will be crc32c-intel.
+
config CRYPTO_MD4
tristate "MD4 digest algorithm"
select CRYPTO_ALGAPI