diff options
author | Philippe Langlais <philippe.langlais@stericsson.com> | 2011-01-27 14:37:07 +0100 |
---|---|---|
committer | Nicolas Pitre <nicolas.pitre@linaro.org> | 2011-02-21 23:10:31 -0500 |
commit | 0d5bc4dc602c156539287e8c2fe3a439c722f60d (patch) | |
tree | d8c3f4fd77722675c64bb6f3cb5d47553ecce274 /arch | |
parent | f27c22c6a4dd0f9c7f28f076c4e7da9366afdc54 (diff) |
mach-ux500: set sd/mmc clock rate to 100MHz
The clock speed for the SD/MMC clock was incorrect, rectify it.
Signed-off-by: Philippe Langlais <philippe.langlais@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
(cherry picked from commit fabb07c7f171dd948064ae984515de139ad7d1e6)
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-ux500/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c index b2b0a3b9be8..9a0a6ed9cd5 100644 --- a/arch/arm/mach-ux500/clock.c +++ b/arch/arm/mach-ux500/clock.c @@ -313,7 +313,7 @@ static DEFINE_PRCMU_CLK_RATE(uartclk, 0x0, 5, UARTCLK, 38400000); static DEFINE_PRCMU_CLK(msp02clk, 0x0, 6, MSP02CLK); static DEFINE_PRCMU_CLK(msp1clk, 0x0, 7, MSP1CLK); /* v1 */ static DEFINE_PRCMU_CLK_RATE(i2cclk, 0x0, 8, I2CCLK, 48000000); -static DEFINE_PRCMU_CLK_RATE(sdmmcclk, 0x0, 9, SDMMCCLK, 50000000); +static DEFINE_PRCMU_CLK_RATE(sdmmcclk, 0x0, 9, SDMMCCLK, 100000000); static DEFINE_PRCMU_CLK(slimclk, 0x0, 10, SLIMCLK); static DEFINE_PRCMU_CLK(per1clk, 0x0, 11, PER1CLK); static DEFINE_PRCMU_CLK(per2clk, 0x0, 12, PER2CLK); |