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authorGreg Ungerer <gerg@snapgear.com>2008-02-01 17:34:30 +1000
committerLinus Torvalds <torvalds@linux-foundation.org>2008-02-01 20:55:43 +1100
commit5f84bd52f03f8606982c75dfbda8c4cc1b725fee (patch)
treeac6e4f3f29b4d203ddee57d480374ad6986e8baf /arch/m68knommu/platform
parent84e6defae684656193621a5812f51ff3561550b1 (diff)
downloadlinux-linaro-5f84bd52f03f8606982c75dfbda8c4cc1b725fee.tar.gz
m68knommu: platform setup for 5249 ColdFire parts
Switch to platform style configuration for 5249 ColdFire parts. Initial support is for the UARTs. DMA support moved to common code for all ColdFire parts. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/m68knommu/platform')
-rw-r--r--arch/m68knommu/platform/5249/config.c69
1 files changed, 57 insertions, 12 deletions
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c
index d4d39435cb1..76a2c785245 100644
--- a/arch/m68knommu/platform/5249/config.c
+++ b/arch/m68knommu/platform/5249/config.c
@@ -12,11 +12,11 @@
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
-#include <asm/dma.h>
+#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
-#include <asm/mcfdma.h>
+#include <asm/mcfuart.h>
/***************************************************************************/
@@ -24,17 +24,51 @@ void coldfire_reset(void);
/***************************************************************************/
-/*
- * DMA channel base address table.
- */
-unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
- MCF_MBAR + MCFDMA_BASE0,
- MCF_MBAR + MCFDMA_BASE1,
- MCF_MBAR + MCFDMA_BASE2,
- MCF_MBAR + MCFDMA_BASE3,
+static struct mcf_platform_uart m5249_uart_platform[] = {
+ {
+ .mapbase = MCF_MBAR + MCFUART_BASE1,
+ .irq = 73,
+ },
+ {
+ .mapbase = MCF_MBAR + MCFUART_BASE2,
+ .irq = 74,
+ }
};
-unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
+static struct platform_device m5249_uart = {
+ .name = "mcfuart",
+ .id = 0,
+ .dev.platform_data = m5249_uart_platform,
+};
+
+static struct platform_device *m5249_devices[] __initdata = {
+ &m5249_uart,
+};
+
+/***************************************************************************/
+
+static void __init m5249_uart_init_line(int line, int irq)
+{
+ if (line == 0) {
+ writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
+ writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
+ mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
+ } else if (line == 1) {
+ writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
+ writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
+ mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
+ }
+}
+
+static void __init m5249_uarts_init(void)
+{
+ const int nrlines = ARRAY_SIZE(m5249_uart_platform);
+ int line;
+
+ for (line = 0; (line < nrlines); line++)
+ m5249_uart_init_line(line, m5249_uart_platform[line].irq);
+}
+
/***************************************************************************/
@@ -85,10 +119,21 @@ int mcf_timerirqpending(int timer)
/***************************************************************************/
-void config_BSP(char *commandp, int size)
+void __init config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
mach_reset = coldfire_reset;
}
/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+ m5249_uarts_init();
+ platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
+ return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/