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authorArnd Bergmann <arnd@arndb.de>2011-10-08 17:07:50 +0200
committerNicolas Pitre <nicolas.pitre@linaro.org>2011-10-17 12:08:00 -0400
commit30ad23712ecc22a4d026a4b6af21ac65c303325e (patch)
tree64f4bc668e0a30ab1a2adb4fefa7d54429607f79 /arch/m32r
parent972f64e8c8af50bb2d3a5fb907f62f276297dcce (diff)
ARM: kprobes: work around build errors
I got a few build errors for kprobes playing with randconfig on the latest kernel. While this patch manages to avoid these errors, I'm pretty sure that it is not the ideal solution. The errors I got in arm are while building for ARMv6 with the arm-linux-gnueabihf-gcc-4.6 provided by Linaro, which results in these messages: /tmp/ccGpftnj.s: Assembler messages: /tmp/ccGpftnj.s:22066: Error: selected processor does not support ARM mode `mls r0,r1,r2,r3' /tmp/ccGpftnj.s:22099: Error: selected processor does not support ARM mode `mlshi r7,r8,r9,r10' /tmp/ccGpftnj.s:22128: Error: selected processor does not support ARM mode `mls lr,r1,r2,r13' /tmp/ccGpftnj.s:23781: Error: selected processor does not support ARM mode `strexd r0,r2,r3,[sp]' /tmp/ccGpftnj.s:23802: Error: selected processor does not support ARM mode `ldrexd r2,r3,[sp]' /tmp/ccGpftnj.s:23823: Error: selected processor does not support ARM mode `strexb r0,r2,[sp]' /tmp/ccGpftnj.s:23844: Error: selected processor does not support ARM mode `ldrexb r2,[sp]' /tmp/ccGpftnj.s:23865: Error: selected processor does not support ARM mode `strexh r0,r2,[sp]' /tmp/ccGpftnj.s:23886: Error: selected processor does not support ARM mode `ldrexh r2,[sp]' /tmp/ccGpftnj.s:25836: Warning: base register written back, and overlaps second transfer register [ NP: I didn't reproduce the T2 errors, and Tixy was doubtful about them. Merged Tixy's change suggestions and his ACK. ] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'arch/m32r')
0 files changed, 0 insertions, 0 deletions