diff options
| author | Zeng Zhaoming <b32542@freescale.com> | 2011-01-26 10:35:15 +0800 |
|---|---|---|
| committer | Alan Tull <alan.tull@freescale.com> | 2011-01-27 10:50:15 -0600 |
| commit | 27fdf7bae11978d21e8aba09bb635f49b07edd4a (patch) | |
| tree | 8b1fca432377457b3f317b79fe853bc7da910c02 /arch/arm/plat-mxc/sdma/iapi/src/iapiLowMcu.c | |
| parent | 75c58543ebb278a4a7896548f39381a323f6715e (diff) | |
ENGR00138121 Fix system hangs when arecord/aplay continuouslyrel_imx_2.6.35_11.01.00
Sdma iapi start loading sdma script by write HSTART register as
memory. When instruction reorder and IRQ delay may let the next
synchronize operation wait forever.
We change it by using writel() to access sdma registers,
and introduce timeout to show this error.
HSTART and STOP_STAT contain bits that are reset by hardware.
So if we read-modify-write, we are in danger of setting a bit
after SDMA has cleared it.
The spec calls these registers "write-ones" register. So the
ARM can write a 1 to any bit, but does not need to worry about
clearing any bits that were previously set. SDMA hardware
keeps track of all bits that were set.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Signed-off-by: Alan Tull <alan.tull@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/sdma/iapi/src/iapiLowMcu.c')
| -rw-r--r-- | arch/arm/plat-mxc/sdma/iapi/src/iapiLowMcu.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/plat-mxc/sdma/iapi/src/iapiLowMcu.c b/arch/arm/plat-mxc/sdma/iapi/src/iapiLowMcu.c index b72234f0e3b..345d36433cf 100644 --- a/arch/arm/plat-mxc/sdma/iapi/src/iapiLowMcu.c +++ b/arch/arm/plat-mxc/sdma/iapi/src/iapiLowMcu.c @@ -1,6 +1,6 @@ /****************************************************************************** * - * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2007-2011 Freescale Semiconductor, Inc. All Rights Reserved. * * * The code contained herein is licensed under the GNU General Public @@ -34,6 +34,7 @@ * Include File Section *****************************************************************************/ #include <string.h> +#include <io.h> #include "epm.h" #include "iapiLow.h" @@ -132,7 +133,8 @@ iapi_Channel0Command(channelDescriptor *cd_p, void *buf, */ void iapi_lowStartChannel(unsigned char channel) { - SDMA_H_START |= 1 << channel; + /* HSTART is a 'write-ones' register */ + writel(1UL << channel, SDMA_H_START_ADDR); } /* ***************************************************************************/ @@ -150,7 +152,8 @@ void iapi_lowStartChannel(unsigned char channel) */ void iapi_lowStopChannel(unsigned char channel) { - SDMA_H_STATSTOP &= 1 << channel; + /* Another 'write-ones' register */ + writel(1UL << channel, SDMA_H_STATSTOP_ADDR); } /* ***************************************************************************/ |