diff options
| author | Jason Chen <jason.chen@linaro.org> | 2011-12-08 15:38:39 +0800 |
|---|---|---|
| committer | Eric Miao <eric.miao@linaro.org> | 2012-01-11 21:39:21 +0800 |
| commit | 2320fa476ab5a56bd907d3f72f0ae94bc55e97e2 (patch) | |
| tree | 134541d0b9a07ec8a096749aafd3e21d607cfa23 | |
| parent | 2aaf79f9e7595dd73bc0e9e53e982c9d616cb6d3 (diff) | |
imx6: change ipu_perclk to 8.25M according to fsl branch
Signed-off-by: Jason Chen <jason.chen@linaro.org>
| -rw-r--r-- | arch/arm/mach-imx/clock-imx6q.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index 5cdafb0e14a..1029a3b2f6a 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c @@ -421,14 +421,17 @@ static unsigned long get_low_reference_clock_rate(struct clk *clk) } static struct clk ckil_clk = { + __INIT_CLK_DEBUG(ckil_clk) .get_rate = get_low_reference_clock_rate, }; static struct clk ckih_clk = { + __INIT_CLK_DEBUG(ckih_clk) .get_rate = get_high_reference_clock_rate, }; static struct clk osc_clk = { + __INIT_CLK_DEBUG(osc_clk) .get_rate = get_oscillator_reference_clock_rate, }; @@ -1939,6 +1942,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "ldb_di0_clk", ldb_di0_clk), _REGISTER_CLOCK(NULL, "ldb_di1_clk", ldb_di1_clk), _REGISTER_CLOCK(NULL, "vpu_clk", vpu_clk), + _REGISTER_CLOCK(NULL, "gpt_clk", gpt_clk), }; int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) @@ -2035,6 +2039,9 @@ int __init mx6q_clocks_init(void) clk_set_rate(&asrc_serial_clk, 1500000); clk_set_rate(&enfc_clk, 11000000); + /* Lower the ipg_perclk frequency to 8.25MHz. */ + clk_set_rate(&ipg_perclk, 8250000); + /* * Before pinctrl API is available, we have to rely on the pad * configuration set up by bootloader. For usdhc example here, |