ENGR00171564-3 MX6Q ARM2: Enable TVIN based on AutoBoard

- Add adv7180 driver to ARM2 support
- Add adv7180 configure
- Chenge CSI configure for BT656 support

Signed-off-by: Even Xu <b21019@freescale.com>

3 files changed, 258 insertions, 21 deletions

diff --git a/drivers/media/video/mxc/capture/Kconfig b/drivers/media/video/mxc/capture/Kconfig
index 595f55bda65..3b2d90f9fd0 100644
--- a/drivers/media/video/mxc/capture/Kconfig
+++ b/drivers/media/video/mxc/capture/Kconfig
@@ -100,7 +100,7 @@ config MXC_CAMERA_OV5642
 
 config MXC_TVIN_ADV7180
 	tristate "Analog Device adv7180 TV Decoder Input support"
-	depends on (MACH_MX35_3DS || MACH_MX51_3DS || MACH_MX6Q_SABREAUTO)
+	depends on (MACH_MX35_3DS || MACH_MX51_3DS || MACH_MX6Q_SABREAUTO || MACH_MX6Q_ARM2)
 	---help---
 	  If you plan to use the adv7180 video decoder with your MXC system, say Y here.
 
diff --git a/drivers/media/video/mxc/capture/adv7180.c b/drivers/media/video/mxc/capture/adv7180.c
index 204a3226a8a..1c8b7f6b3df 100644
--- a/drivers/media/video/mxc/capture/adv7180.c
+++ b/drivers/media/video/mxc/capture/adv7180.c
@@ -153,7 +153,7 @@ static video_fmt_idx video_idx = ADV7180_PAL;
  *  read/write access to the globally accessible data structures
  *  and variables that were defined above.
  */
-static DEFINE_SEMAPHORE(semaphore);
+static DEFINE_MUTEX(mutex);
 
 #define IF_NAME                    "adv7180"
 #define ADV7180_INPUT_CTL              0x00	/* Input Control */
@@ -256,7 +256,7 @@ static void adv7180_get_std(v4l2_std_id *std)
 	/* Read the AD_RESULT to get the detect output video standard */
 	tmp = adv7180_read(ADV7180_STATUS_1) & 0x70;
 
-	down(&semaphore);
+	mutex_lock(&mutex);
 	if (tmp == 0x40) {
 		/* PAL */
 		*std = V4L2_STD_PAL;
@@ -271,7 +271,7 @@ static void adv7180_get_std(v4l2_std_id *std)
 		dev_dbg(&adv7180_data.i2c_client->dev,
 			"Got invalid video standard!\n");
 	}
-	up(&semaphore);
+	mutex_unlock(&mutex);
 
 	/* This assumes autodetect which this device uses. */
 	if (*std != adv7180_data.std_id) {
@@ -821,8 +821,244 @@ static void adv7180_hard_reset(bool cvbs)
 	}
 
 	/* Datasheet recommends */
-	adv7180_write_reg(ADV7180_VSYNC_FIELD_CTL_1, 0x02);
-	adv7180_write_reg(ADV7180_MANUAL_WIN_CTL, 0xa2);
+	adv7180_write_reg(0x01, 0xc8);
+	adv7180_write_reg(0x02, 0x04);
+	adv7180_write_reg(0x03, 0x00);
+	adv7180_write_reg(0x04, 0x45);
+	adv7180_write_reg(0x05, 0x00);
+	adv7180_write_reg(0x06, 0x02);
+	adv7180_write_reg(0x07, 0x7F);
+	adv7180_write_reg(0x08, 0x80);
+	adv7180_write_reg(0x0A, 0x00);
+	adv7180_write_reg(0x0B, 0x00);
+	adv7180_write_reg(0x0C, 0x36);
+	adv7180_write_reg(0x0D, 0x7C);
+	adv7180_write_reg(0x0E, 0x00);
+	adv7180_write_reg(0x0F, 0x00);
+	adv7180_write_reg(0x13, 0x00);
+	adv7180_write_reg(0x14, 0x12);
+	adv7180_write_reg(0x15, 0x00);
+	adv7180_write_reg(0x16, 0x00);
+	adv7180_write_reg(0x17, 0x01);
+	adv7180_write_reg(0x18, 0x93);
+	adv7180_write_reg(0xF1, 0x19);
+	adv7180_write_reg(0x1A, 0x00);
+	adv7180_write_reg(0x1B, 0x00);
+	adv7180_write_reg(0x1C, 0x00);
+	adv7180_write_reg(0x1D, 0x40);
+	adv7180_write_reg(0x1E, 0x00);
+	adv7180_write_reg(0x1F, 0x00);
+	adv7180_write_reg(0x20, 0x00);
+	adv7180_write_reg(0x21, 0x00);
+	adv7180_write_reg(0x22, 0x00);
+	adv7180_write_reg(0x23, 0xC0);
+	adv7180_write_reg(0x24, 0x00);
+	adv7180_write_reg(0x25, 0x00);
+	adv7180_write_reg(0x26, 0x00);
+	adv7180_write_reg(0x27, 0x58);
+	adv7180_write_reg(0x28, 0x00);
+	adv7180_write_reg(0x29, 0x00);
+	adv7180_write_reg(0x2A, 0x00);
+	adv7180_write_reg(0x2B, 0xE1);
+	adv7180_write_reg(0x2C, 0xAE);
+	adv7180_write_reg(0x2D, 0xF4);
+	adv7180_write_reg(0x2E, 0x00);
+	adv7180_write_reg(0x2F, 0xF0);
+	adv7180_write_reg(0x30, 0x00);
+	adv7180_write_reg(0x31, 0x12);
+	adv7180_write_reg(0x32, 0x41);
+	adv7180_write_reg(0x33, 0x84);
+	adv7180_write_reg(0x34, 0x00);
+	adv7180_write_reg(0x35, 0x02);
+	adv7180_write_reg(0x36, 0x00);
+	adv7180_write_reg(0x37, 0x01);
+	adv7180_write_reg(0x38, 0x80);
+	adv7180_write_reg(0x39, 0xC0);
+	adv7180_write_reg(0x3A, 0x10);
+	adv7180_write_reg(0x3B, 0x05);
+	adv7180_write_reg(0x3C, 0x58);
+	adv7180_write_reg(0x3D, 0xB2);
+	adv7180_write_reg(0x3E, 0x64);
+	adv7180_write_reg(0x3F, 0xE4);
+	adv7180_write_reg(0x40, 0x90);
+	adv7180_write_reg(0x41, 0x01);
+	adv7180_write_reg(0x42, 0x7E);
+	adv7180_write_reg(0x43, 0xA4);
+	adv7180_write_reg(0x44, 0xFF);
+	adv7180_write_reg(0x45, 0xB6);
+	adv7180_write_reg(0x46, 0x12);
+	adv7180_write_reg(0x48, 0x00);
+	adv7180_write_reg(0x49, 0x00);
+	adv7180_write_reg(0x4A, 0x00);
+	adv7180_write_reg(0x4B, 0x00);
+	adv7180_write_reg(0x4C, 0x00);
+	adv7180_write_reg(0x4D, 0xEF);
+	adv7180_write_reg(0x4E, 0x08);
+	adv7180_write_reg(0x4F, 0x08);
+	adv7180_write_reg(0x50, 0x08);
+	adv7180_write_reg(0x51, 0x24);
+	adv7180_write_reg(0x52, 0x0B);
+	adv7180_write_reg(0x53, 0x4E);
+	adv7180_write_reg(0x54, 0x80);
+	adv7180_write_reg(0x55, 0x00);
+	adv7180_write_reg(0x56, 0x10);
+	adv7180_write_reg(0x57, 0x00);
+	adv7180_write_reg(0x58, 0x00);
+	adv7180_write_reg(0x59, 0x00);
+	adv7180_write_reg(0x5A, 0x00);
+	adv7180_write_reg(0x5B, 0x00);
+	adv7180_write_reg(0x5C, 0x00);
+	adv7180_write_reg(0x5D, 0x00);
+	adv7180_write_reg(0x5E, 0x00);
+	adv7180_write_reg(0x5F, 0x00);
+	adv7180_write_reg(0x60, 0x00);
+	adv7180_write_reg(0x61, 0x00);
+	adv7180_write_reg(0x62, 0x20);
+	adv7180_write_reg(0x63, 0x00);
+	adv7180_write_reg(0x64, 0x00);
+	adv7180_write_reg(0x65, 0x00);
+	adv7180_write_reg(0x66, 0x00);
+	adv7180_write_reg(0x67, 0x03);
+	adv7180_write_reg(0x68, 0x01);
+	adv7180_write_reg(0x69, 0x00);
+	adv7180_write_reg(0x6A, 0x00);
+	adv7180_write_reg(0x6B, 0xC0);
+	adv7180_write_reg(0x6C, 0x00);
+	adv7180_write_reg(0x6D, 0x00);
+	adv7180_write_reg(0x6E, 0x00);
+	adv7180_write_reg(0x6F, 0x00);
+	adv7180_write_reg(0x70, 0x00);
+	adv7180_write_reg(0x71, 0x00);
+	adv7180_write_reg(0x72, 0x00);
+	adv7180_write_reg(0x73, 0x10);
+	adv7180_write_reg(0x74, 0x04);
+	adv7180_write_reg(0x75, 0x01);
+	adv7180_write_reg(0x76, 0x00);
+	adv7180_write_reg(0x77, 0x3F);
+	adv7180_write_reg(0x78, 0xFF);
+	adv7180_write_reg(0x79, 0xFF);
+	adv7180_write_reg(0x7A, 0xFF);
+	adv7180_write_reg(0x7B, 0x1E);
+	adv7180_write_reg(0x7C, 0xC0);
+	adv7180_write_reg(0x7D, 0x00);
+	adv7180_write_reg(0x7E, 0x00);
+	adv7180_write_reg(0x7F, 0x00);
+	adv7180_write_reg(0x80, 0x00);
+	adv7180_write_reg(0x81, 0xC0);
+	adv7180_write_reg(0x82, 0x04);
+	adv7180_write_reg(0x83, 0x00);
+	adv7180_write_reg(0x84, 0x0C);
+	adv7180_write_reg(0x85, 0x02);
+	adv7180_write_reg(0x86, 0x03);
+	adv7180_write_reg(0x87, 0x63);
+	adv7180_write_reg(0x88, 0x5A);
+	adv7180_write_reg(0x89, 0x08);
+	adv7180_write_reg(0x8A, 0x10);
+	adv7180_write_reg(0x8B, 0x00);
+	adv7180_write_reg(0x8C, 0x40);
+	adv7180_write_reg(0x8D, 0x00);
+	adv7180_write_reg(0x8E, 0x40);
+	adv7180_write_reg(0x8F, 0x00);
+	adv7180_write_reg(0x90, 0x00);
+	adv7180_write_reg(0x91, 0x50);
+	adv7180_write_reg(0x92, 0x00);
+	adv7180_write_reg(0x93, 0x00);
+	adv7180_write_reg(0x94, 0x00);
+	adv7180_write_reg(0x95, 0x00);
+	adv7180_write_reg(0x96, 0x00);
+	adv7180_write_reg(0x97, 0xF0);
+	adv7180_write_reg(0x98, 0x00);
+	adv7180_write_reg(0x99, 0x00);
+	adv7180_write_reg(0x9A, 0x00);
+	adv7180_write_reg(0x9B, 0x00);
+	adv7180_write_reg(0x9C, 0x00);
+	adv7180_write_reg(0x9D, 0x00);
+	adv7180_write_reg(0x9E, 0x00);
+	adv7180_write_reg(0x9F, 0x00);
+	adv7180_write_reg(0xA0, 0x00);
+	adv7180_write_reg(0xA1, 0x00);
+	adv7180_write_reg(0xA2, 0x00);
+	adv7180_write_reg(0xA3, 0x00);
+	adv7180_write_reg(0xA4, 0x00);
+	adv7180_write_reg(0xA5, 0x00);
+	adv7180_write_reg(0xA6, 0x00);
+	adv7180_write_reg(0xA7, 0x00);
+	adv7180_write_reg(0xA8, 0x00);
+	adv7180_write_reg(0xA9, 0x00);
+	adv7180_write_reg(0xAA, 0x00);
+	adv7180_write_reg(0xAB, 0x00);
+	adv7180_write_reg(0xAC, 0x00);
+	adv7180_write_reg(0xAD, 0x00);
+	adv7180_write_reg(0xAE, 0x60);
+	adv7180_write_reg(0xAF, 0x00);
+	adv7180_write_reg(0xB0, 0x00);
+	adv7180_write_reg(0xB1, 0x60);
+	adv7180_write_reg(0xB2, 0x1C);
+	adv7180_write_reg(0xB3, 0x54);
+	adv7180_write_reg(0xB4, 0x00);
+	adv7180_write_reg(0xB5, 0x00);
+	adv7180_write_reg(0xB6, 0x00);
+	adv7180_write_reg(0xB7, 0x13);
+	adv7180_write_reg(0xB8, 0x03);
+	adv7180_write_reg(0xB9, 0x33);
+	adv7180_write_reg(0xBF, 0x02);
+	adv7180_write_reg(0xC0, 0x00);
+	adv7180_write_reg(0xC1, 0x00);
+	adv7180_write_reg(0xC2, 0x00);
+	adv7180_write_reg(0xC3, 0x00);
+	adv7180_write_reg(0xC4, 0x00);
+	adv7180_write_reg(0xC5, 0x81);
+	adv7180_write_reg(0xC6, 0x00);
+	adv7180_write_reg(0xC7, 0x00);
+	adv7180_write_reg(0xC8, 0x00);
+	adv7180_write_reg(0xC9, 0x04);
+	adv7180_write_reg(0xCC, 0x69);
+	adv7180_write_reg(0xCD, 0x00);
+	adv7180_write_reg(0xCE, 0x01);
+	adv7180_write_reg(0xCF, 0xB4);
+	adv7180_write_reg(0xD0, 0x00);
+	adv7180_write_reg(0xD1, 0x10);
+	adv7180_write_reg(0xD2, 0xFF);
+	adv7180_write_reg(0xD3, 0xFF);
+	adv7180_write_reg(0xD4, 0x7F);
+	adv7180_write_reg(0xD5, 0x7F);
+	adv7180_write_reg(0xD6, 0x3E);
+	adv7180_write_reg(0xD7, 0x08);
+	adv7180_write_reg(0xD8, 0x3C);
+	adv7180_write_reg(0xD9, 0x08);
+	adv7180_write_reg(0xDA, 0x3C);
+	adv7180_write_reg(0xDB, 0x9B);
+	adv7180_write_reg(0xDC, 0xAC);
+	adv7180_write_reg(0xDD, 0x4C);
+	adv7180_write_reg(0xDE, 0x00);
+	adv7180_write_reg(0xDF, 0x00);
+	adv7180_write_reg(0xE0, 0x14);
+	adv7180_write_reg(0xE1, 0x80);
+	adv7180_write_reg(0xE2, 0x80);
+	adv7180_write_reg(0xE3, 0x80);
+	adv7180_write_reg(0xE4, 0x80);
+	adv7180_write_reg(0xE5, 0x25);
+	adv7180_write_reg(0xE6, 0x44);
+	adv7180_write_reg(0xE7, 0x63);
+	adv7180_write_reg(0xE8, 0x65);
+	adv7180_write_reg(0xE9, 0x14);
+	adv7180_write_reg(0xEA, 0x63);
+	adv7180_write_reg(0xEB, 0x55);
+	adv7180_write_reg(0xEC, 0x55);
+	adv7180_write_reg(0xEE, 0x00);
+	adv7180_write_reg(0xEF, 0x4A);
+	adv7180_write_reg(0xF0, 0x44);
+	adv7180_write_reg(0xF1, 0x0C);
+	adv7180_write_reg(0xF2, 0x32);
+	adv7180_write_reg(0xF3, 0x00);
+	adv7180_write_reg(0xF4, 0x3F);
+	adv7180_write_reg(0xF5, 0xE0);
+	adv7180_write_reg(0xF6, 0x69);
+	adv7180_write_reg(0xF7, 0x10);
+	adv7180_write_reg(0xF8, 0x00);
+	adv7180_write_reg(0xF9, 0x03);
+	adv7180_write_reg(0xFA, 0xFA);
+	adv7180_write_reg(0xFB, 0x40);
 }
 
 /*! ADV7180 I2C attach function.
@@ -890,6 +1126,8 @@ static int adv7180_probe(struct i2c_client *client,
 		}
 	}
 
+	if (tvin_plat->io_init)
+		tvin_plat->io_init();
 
 	if (tvin_plat->reset)
 		tvin_plat->reset();
@@ -950,9 +1188,7 @@ static int adv7180_probe(struct i2c_client *client,
  */
 static int adv7180_detach(struct i2c_client *client)
 {
-	struct fsl_mxc_tvin_platform_data *plat_data;
-
-	plat_data = client->dev.platform_data;
+	struct fsl_mxc_tvin_platform_data *plat_data = client->dev.platform_data;
 
 	dev_dbg(&adv7180_data.i2c_client->dev,
 		"%s:Removing %s video decoder @ 0x%02X from adapter %s\n",
diff --git a/drivers/mxc/ipu3/ipu_capture.c b/drivers/mxc/ipu3/ipu_capture.c
index 7ed2e7df991..2b818a0276a 100644
--- a/drivers/mxc/ipu3/ipu_capture.c
+++ b/drivers/mxc/ipu3/ipu_capture.c
@@ -144,28 +144,29 @@ ipu_csi_init_interface(struct ipu_soc *ipu, uint16_t width, uint16_t height,
 		if (width == 720 && height == 625) {
 			/* PAL case */
 			/*
-			 * Field0BlankEnd = 0x6, Field0BlankStart = 0x2,
-			 * Field0ActiveEnd = 0x4, Field0ActiveStart = 0
+			 * Field0BlankEnd = 0x7, Field0BlankStart = 0x3,
+			 * Field0ActiveEnd = 0x5, Field0ActiveStart = 0x1
 			 */
-			ipu_csi_write(ipu, csi, 0x40596, CSI_CCIR_CODE_1);
+			ipu_csi_write(ipu, csi, 0xD07DF, CSI_CCIR_CODE_1);
 			/*
-			 * Field1BlankEnd = 0x7, Field1BlankStart = 0x3,
-			 * Field1ActiveEnd = 0x5, Field1ActiveStart = 0x1
+			 * Field1BlankEnd = 0x6, Field1BlankStart = 0x2,
+			 * Field1ActiveEnd = 0x4, Field1ActiveStart = 0
 			 */
-			ipu_csi_write(ipu, csi, 0xD07DF, CSI_CCIR_CODE_2);
+			ipu_csi_write(ipu, csi, 0x40596, CSI_CCIR_CODE_2);
 			ipu_csi_write(ipu, csi, 0xFF0000, CSI_CCIR_CODE_3);
+
 		} else if (width == 720 && height == 525) {
 			/* NTSC case */
 			/*
-			 * Field0BlankEnd = 0x7, Field0BlankStart = 0x3,
-			 * Field0ActiveEnd = 0x5, Field0ActiveStart = 0x1
-			 */
-			ipu_csi_write(ipu, csi, 0xD07DF, CSI_CCIR_CODE_1);
-			/*
 			 * Field1BlankEnd = 0x6, Field1BlankStart = 0x2,
 			 * Field1ActiveEnd = 0x4, Field1ActiveStart = 0
 			 */
-			ipu_csi_write(ipu, csi, 0x40596, CSI_CCIR_CODE_2);
+			ipu_csi_write(ipu, csi, 0x40596, CSI_CCIR_CODE_1);
+			/*
+			 * Field0BlankEnd = 0x7, Field0BlankStart = 0x3,
+			 * Field0ActiveEnd = 0x5, Field0ActiveStart = 0x1
+			 */
+			ipu_csi_write(ipu, csi, 0xD07DF, CSI_CCIR_CODE_2);
 			ipu_csi_write(ipu, csi, 0xFF0000, CSI_CCIR_CODE_3);
 		} else {
 			dev_err(ipu->dev, "Unsupported CCIR656 interlaced "