diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2010-06-04 13:07:30 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2010-06-08 17:34:09 +0100 |
| commit | 4c6dfbfe2926eca135851dc5c403bf3ab84c533b (patch) | |
| tree | 28cf3f64a58082d5713561c401f48cc1db50dafa | |
| parent | f88d34cc4565c54ed9b16c1d7da966c778c3ced9 (diff) | |
ARM: Do not enable ARM_DMA_MEM_BUFFERABLE for some RealView boards
RealView boards with certain revisions of the L210/L220 cache controller
may have issues with recent changes to the mb() barrier implementation
(DSB followed by an L2 cache sync).
This patch proposes that the mb() barrier performs an outer cache sync
only when ARM_DMA_MEM_BUFFERABLE is enabled. When this is option is
disabled, the coherent DMA buffers are mapped as Strongly Ordered and
there is no need for an L2 cache sync.
The patch also disables ARM_DMA_MEM_BUFFERABLE for some of the RealView
boards with L210/L220.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Linus Walleij <linus.ml.walleij@gmail.com>
Cc: Bjoern B. Brandenburg <bbb.lst@gmail.com>
| -rw-r--r-- | arch/arm/include/asm/system.h | 6 | ||||
| -rw-r--r-- | arch/arm/mm/Kconfig | 2 |
2 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 5f4f4800273..3b2abcf3a4a 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -141,10 +141,14 @@ extern unsigned int user_debug; #ifdef CONFIG_ARCH_HAS_BARRIERS #include <mach/barriers.h> -#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP) +#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) #define mb() do { dsb(); outer_sync(); } while (0) #define rmb() dmb() #define wmb() mb() +#elif defined(CONFIG_SMP) +#define mb() dsb() +#define rmb() dmb() +#define wmb() mb() #else #define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) #define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 3053731aec7..9f10a9b4f7b 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -828,6 +828,8 @@ config ARM_L1_CACHE_SHIFT config ARM_DMA_MEM_BUFFERABLE bool "Use non-cacheable memory for DMA" if CPU_V6 && !CPU_V7 + depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \ + MACH_REALVIEW_PB11MP) default y if CPU_V6 || CPU_V7 help Historically, the kernel has used strongly ordered mappings to |