From c9e34fe2e86f7b6cc8260f4b24cbdc7dd81e04c5 Mon Sep 17 00:00:00 2001 From: Valeriy Glushkov Date: Thu, 5 Feb 2009 14:35:21 +0200 Subject: mpc8349itx: allow SATA boot from the onboard SIL1334 This patch allows using of SATA devices connected to the onboard PCI SIL1334 SATA controller. Signed-off-by: Valeriy Glushkov Signed-off-by: Kim Phillips --- include/configs/MPC8349ITX.h | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 14cbc4571..5e1ddaedd 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -78,6 +78,7 @@ #ifdef CONFIG_MPC8349ITX #define CONFIG_COMPACT_FLASH /* The CF card interface on the back of the board */ #define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */ +#define CONFIG_SATA_SIL3114 /* SIL3114 SATA controller */ #endif #define CONFIG_PCI @@ -141,7 +142,16 @@ #define ATA_RESET_TIME 1 /* If a CF card is not inserted, time out quickly */ -#define CONFIG_DOS_PARTITION +#endif + +/* + * SATA + */ +#ifdef CONFIG_SATA_SIL3114 + +#define CONFIG_SYS_SATA_MAX_DEVICE 4 +#define CONFIG_LIBATA +#define CONFIG_LBA48 #endif @@ -449,9 +459,18 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_CMD_PING #define CONFIG_CMD_SDRAM +#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114) + #define CONFIG_DOS_PARTITION + #define CONFIG_CMD_FAT +#endif + #ifdef CONFIG_COMPACT_FLASH #define CONFIG_CMD_IDE - #define CONFIG_CMD_FAT +#endif + +#ifdef CONFIG_SATA_SIL3114 + #define CONFIG_CMD_SATA + #define CONFIG_CMD_EXT2 #endif #ifdef CONFIG_PCI -- cgit v1.2.3 From 2b68b23373f96199a0cafbfd7a9f79ed62381ebb Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Wed, 11 Feb 2009 19:26:15 +0100 Subject: 83xx: add missing TIMING_CFG1_CASLAT_* defines Signed-off-by: Heiko Schocher Signed-off-by: Kim Phillips --- include/mpc83xx.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/mpc83xx.h b/include/mpc83xx.h index 3554fdd4e..fab37516c 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -890,6 +890,8 @@ #define TIMING_CFG1_CASLAT_30 0x00050000 /* CAS latency = 3.0 */ #define TIMING_CFG1_CASLAT_35 0x00060000 /* CAS latency = 3.5 */ #define TIMING_CFG1_CASLAT_40 0x00070000 /* CAS latency = 4.0 */ +#define TIMING_CFG1_CASLAT_45 0x00080000 /* CAS latency = 4.5 */ +#define TIMING_CFG1_CASLAT_50 0x00090000 /* CAS latency = 5.0 */ /* TIMING_CFG_2 - DDR SDRAM Timing Configuration 2 */ -- cgit v1.2.3 From cc2a8c7751ddbae3116660064f446888538b93e9 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Thu, 19 Feb 2009 18:20:41 +0300 Subject: PCI: Add pci_last_busno() helper This is just a handy routine that reports last PCI busno: we walk down all the hoses and return last hose's last_busno. Will be used by PCI/PCIe initialization code. Signed-off-by: Anton Vorontsov Signed-off-by: Kim Phillips --- include/pci.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/pci.h b/include/pci.h index d0594e316..aaa455434 100644 --- a/include/pci.h +++ b/include/pci.h @@ -535,6 +535,8 @@ extern int pci_hose_config_device(struct pci_controller *hose, pci_addr_t mem, unsigned long command); +int pci_last_busno(void); + #ifdef CONFIG_MPC824X extern void pci_mpc824x_init (struct pci_controller *hose); #endif -- cgit v1.2.3 From 7e91558032a0c1932dd7f4f562f9c7cc55efc496 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Thu, 19 Feb 2009 18:20:52 +0300 Subject: mpc83xx: MPC837XERDB: Add PCIe support On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe slots. Let's support them. Signed-off-by: Anton Vorontsov Signed-off-by: Kim Phillips --- include/configs/MPC837XERDB.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 2e31dd00a..8d0c93b71 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -49,6 +49,7 @@ #else #define CONFIG_83XX_CLKIN 66666667 /* in Hz */ #define CONFIG_83XX_GENERIC_PCI 1 +#define CONFIG_83XX_GENERIC_PCIE 1 #endif #ifndef CONFIG_SYS_CLK_FREQ @@ -375,6 +376,26 @@ #define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000 #define CONFIG_SYS_PCI_SLV_MEM_SIZE 0x80000000 +#define CONFIG_SYS_PCIE1_BASE 0xA0000000 +#define CONFIG_SYS_PCIE1_CFG_BASE 0xA0000000 +#define CONFIG_SYS_PCIE1_CFG_SIZE 0x08000000 +#define CONFIG_SYS_PCIE1_MEM_BASE 0xA8000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0xA8000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 +#define CONFIG_SYS_PCIE1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE1_IO_PHYS 0xB8000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 + +#define CONFIG_SYS_PCIE2_BASE 0xC0000000 +#define CONFIG_SYS_PCIE2_CFG_BASE 0xC0000000 +#define CONFIG_SYS_PCIE2_CFG_SIZE 0x08000000 +#define CONFIG_SYS_PCIE2_MEM_BASE 0xC8000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xC8000000 +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 +#define CONFIG_SYS_PCIE2_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE2_IO_PHYS 0xD8000000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 + #ifdef CONFIG_PCI #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ -- cgit v1.2.3