From 50712ba16e7e469e90952a7f197efa46e2f8e311 Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Sun, 3 Apr 2005 23:35:57 +0000
Subject: =?UTF-8?q?*=20Patch=20by=20Mathias=20K=FCster,=2023=20Nov=202004:?=
 =?UTF-8?q?=20=20=20add=20udelay=20support=20for=20the=20mcf5282=20cpu?=
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* Patch by Tolunay Orkun, 16 November 2004:
  fix incorrect onboard Xilinx CPLD base address
---
 board/csb472/init.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'board/csb472')

diff --git a/board/csb472/init.S b/board/csb472/init.S
index ca0241bd8..aec42a14b 100644
--- a/board/csb472/init.S
+++ b/board/csb472/init.S
@@ -129,7 +129,7 @@ ext_bus_cntlr_init:
 	 *******************************************************************/
 	/*WDCR_EBC(pb3ap, 0x07869200)*/
 	WDCR_EBC(pb3ap, 0x04055200)
-	WDCR_EBC(pb3cr, 0xff01c000)
+	WDCR_EBC(pb3cr, 0xf081c000)
 	/********************************************************************
 	 * Memory Bank 1,2,4-7 (Unused) initialization
 	 *******************************************************************/
-- 
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