From 7b3d5380eea55f5b2e21c592b256b7077698f766 Mon Sep 17 00:00:00 2001 From: Ondrej Kupka Date: Fri, 30 Sep 2011 21:05:11 +1100 Subject: x86: turn off cache: set control register properly Bits should be ORed when they are supposed to be added together Signed-off-by: Ondrej Kupka --- arch/x86/cpu/start16.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S index 3d3017a0e..9dabff2b9 100644 --- a/arch/x86/cpu/start16.S +++ b/arch/x86/cpu/start16.S @@ -50,7 +50,7 @@ board_init16_ret: /* Turn of cache (this might require a 486-class CPU) */ movl %cr0, %eax - orl $(X86_CR0_NW & X86_CR0_CD), %eax + orl $(X86_CR0_NW | X86_CR0_CD), %eax movl %eax, %cr0 wbinvd -- cgit v1.2.3