From ac6b911514ac834b87fd7c13be798f6e41767efd Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 6 Dec 2012 15:44:11 +0100 Subject: cfi_flash: Enable PPB protection for all AMD cmdset flash chips Not only Spansion supports the Persistent Protection Bits (PPB) locking. Other devices like the Micron JS28F512M29EWx also support this type of locking/unlocking. Detection of support is done in the same way as done for the Spansion chips - via the 0x49 CFI word. This patch enables this PPB protection mechanism for all AMD type (AMD commandset) chips. Signed-off-by: Stefan Roese Cc: Anatolij Gustschin Cc: Holger Brunck Tested-by: Holger Brunck --- drivers/mtd/cfi_flash.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 2ca73f962..048a7a749 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1511,7 +1511,7 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) 0, ATM_CMD_UNLOCK_SECT); } } - if (manufact_match(info, AMD_MANUFACT)) { + if (info->legacy_unlock) { int flag = disable_interrupts(); int lock_flag; @@ -1742,12 +1742,9 @@ static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); #ifdef CONFIG_SYS_FLASH_PROTECTION - if (info->ext_addr && manufact_match(info, AMD_MANUFACT)) { - ushort spus; - - /* read sector protect/unprotect scheme */ - spus = flash_read_uchar(info, info->ext_addr + 9); - if (spus == 0x8) + if (info->ext_addr) { + /* read sector protect/unprotect scheme (at 0x49) */ + if (flash_read_uchar(info, info->ext_addr + 9) == 0x8) info->legacy_unlock = 1; } #endif @@ -2185,7 +2182,7 @@ ulong flash_get_size (phys_addr_t base, int banknum) break; case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD: - if (!manufact_match(info, AMD_MANUFACT)) { + if (!info->legacy_unlock) { /* default: not protected */ info->protect[sect_cnt] = 0; break; -- cgit v1.2.3