From b581626c1e2474a3dadf69d4f0e0582eccbc4235 Mon Sep 17 00:00:00 2001 From: Norbert van Bolhuis Date: Fri, 13 Mar 2009 08:58:14 +0100 Subject: mpc83xx: correctly set encryption and I2C bus 0 clock This patch makes sure the correct mask is applied when setting the encryption and I2C bus 0 clock in SCCR. Failing to do so may lead to ENCCM being 0 in which case I2C bus 0 won't function. Signed-off-by: Norbert van Bolhuis Signed-off-by: Kim Phillips --- cpu/mpc83xx/cpu_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index 491c2e5c3..8e9c87559 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -106,7 +106,7 @@ void cpu_init_f (volatile immap_t * im) #ifdef CONFIG_SYS_SCCR_ENCCM /* Encryption clock mode */ im->clk.sccr = (im->clk.sccr & ~SCCR_ENCCM) | - (CONFIG_SYS_SCCR_ENCCM << SCCR_PCICM_SHIFT); + (CONFIG_SYS_SCCR_ENCCM << SCCR_ENCCM_SHIFT); #endif #ifdef CONFIG_SYS_SCCR_PCICM -- cgit v1.2.3 From 394d30dd1ee23b80fd5e59e17ebe0feca927ab31 Mon Sep 17 00:00:00 2001 From: Jerry Van Baren Date: Fri, 13 Mar 2009 11:40:10 -0400 Subject: mpc83xx: Add bank configuration to FSL spd_sdram.c The routine assumed 4 bank SDRAMs, enhance to configure for 4 or 8 bank SDRAMs. Signed-off-by: Gerald Van Baren Acked-by: Dave Liu Signed-off-by: Kim Phillips --- cpu/mpc83xx/spd_sdram.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index ff15cda7a..4704d2006 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -219,7 +219,8 @@ long int spd_sdram() ddr->cs_config[0] = ( 1 << 31 | (odt_rd_cfg << 20) | (odt_wr_cfg << 16) - | (spd.nrow_addr - 12) << 8 + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) | (spd.ncol_addr - 8) ); debug("\n"); debug("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds); @@ -231,8 +232,9 @@ long int spd_sdram() ddr->cs_config[1] = ( 1<<31 | (odt_rd_cfg << 20) | (odt_wr_cfg << 16) - | (spd.nrow_addr-12) << 8 - | (spd.ncol_addr-8) ); + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) + | (spd.ncol_addr - 8) ); debug("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds); debug("cs1_config = 0x%08x\n",ddr->cs_config[1]); } @@ -242,7 +244,8 @@ long int spd_sdram() ddr->cs_config[2] = ( 1 << 31 | (odt_rd_cfg << 20) | (odt_wr_cfg << 16) - | (spd.nrow_addr - 12) << 8 + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) | (spd.ncol_addr - 8) ); debug("\n"); debug("cs2_bnds = 0x%08x\n",ddr->csbnds[2].csbnds); @@ -254,8 +257,9 @@ long int spd_sdram() ddr->cs_config[3] = ( 1<<31 | (odt_rd_cfg << 20) | (odt_wr_cfg << 16) - | (spd.nrow_addr-12) << 8 - | (spd.ncol_addr-8) ); + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) + | (spd.ncol_addr - 8) ); debug("cs3_bnds = 0x%08x\n",ddr->csbnds[3].csbnds); debug("cs3_config = 0x%08x\n",ddr->cs_config[3]); } -- cgit v1.2.3