diff options
Diffstat (limited to 'include')
35 files changed, 109 insertions, 78 deletions
diff --git a/include/common.h b/include/common.h index 0a64c71b4..0686a173d 100644 --- a/include/common.h +++ b/include/common.h @@ -584,8 +584,6 @@ uint dpram_base(void); uint dpram_base_align(uint align); uint dpram_alloc(uint size); uint dpram_alloc_align(uint size,uint align); -void post_word_store (ulong); -ulong post_word_load (void); void bootcount_store (ulong); ulong bootcount_load (void); #define BOOTCOUNT_MAGIC 0xB001C041 @@ -730,6 +728,9 @@ int cpu_release(int nr, int argc, char * const argv[]); #ifdef CONFIG_POST #define CONFIG_HAS_POST +#ifndef CONFIG_POST_ALT_LIST +#define CONFIG_POST_STD_LIST +#endif #endif #ifdef CONFIG_INIT_CRITICAL diff --git a/include/config_defaults.h b/include/config_defaults.h index 0337163c2..abdf3beb0 100644 --- a/include/config_defaults.h +++ b/include/config_defaults.h @@ -12,6 +12,7 @@ /* Support bootm-ing different OSes */ #define CONFIG_BOOTM_LINUX 1 #define CONFIG_BOOTM_NETBSD 1 +#define CONFIG_BOOTM_OSE 1 #define CONFIG_BOOTM_RTEMS 1 #define CONFIG_GZIP 1 diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 550c462b8..764f71be3 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -109,6 +109,7 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #undef CONFIG_EXT_PHY #define CONFIG_NET_MULTI 1 @@ -402,6 +403,7 @@ * I2C EEPROM (CAT24WC16) for environment */ #define CONFIG_HARD_I2C /* I2c with hardware support */ +#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F @@ -414,16 +416,6 @@ /* last 4 bits of the address */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */ - /* have only 8kB, 16kB is save here */ -#define CONFIG_SYS_CACHELINE_SIZE 32 /* ... */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - /* * Init Memory Controller: * @@ -574,17 +566,6 @@ #define DIMM_READ_ADDR 0xAB #define DIMM_WRITE_ADDR 0xAA -#define CPC0_PLLMR0 (CNTRL_DCR_BASE+0x0) /* PLL mode 0 register */ -#define CPC0_BOOT (CNTRL_DCR_BASE+0x1) /* Chip Clock Status register */ -#define CPC0_CR1 (CNTRL_DCR_BASE+0x2) /* Chip Control 1 register */ -#define CPC0_EPRCSR (CNTRL_DCR_BASE+0x3) /* EMAC PHY Rcv Clk Src register */ -#define CPC0_PLLMR1 (CNTRL_DCR_BASE+0x4) /* PLL mode 1 register */ -#define CPC0_UCR (CNTRL_DCR_BASE+0x5) /* UART Control register */ -#define CPC0_SRR (CNTRL_DCR_BASE+0x6) /* Soft Reset register */ -#define CPC0_JTAGID (CNTRL_DCR_BASE+0x7) /* JTAG ID register */ -#define CPC0_SPARE (CNTRL_DCR_BASE+0x8) /* Spare DCR */ -#define CPC0_PCI (CNTRL_DCR_BASE+0x9) /* PCI Control register */ - /* Defines for CPC0_PLLMR1 Register fields */ #define PLL_ACTIVE 0x80000000 #define CPC0_PLLMR1_SSCS 0x80000000 diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index a44d8fabb..94cc31756 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -81,8 +81,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Rsrv 256kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Rsrv 128kB for malloc */ diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index d805a245d..2e63306d9 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -143,8 +143,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Rsrv 256kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Rsrv 128kB for malloc */ diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index e833e6d19..bfff7504f 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -311,10 +311,6 @@ /* reserve some memory for POST and BOOT limit info */ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32) -#ifdef CONFIG_POST /* reserve one word for POST Info */ -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4) -#endif - #ifdef CONFIG_BOOTCOUNT_LIMIT /* reserve 2 word for bootcount limit */ #define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12) #endif diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index fd2e9a9f9..bf2247dbd 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -87,7 +87,7 @@ #define CONFIG_SYS_INIT_RAM_END (4 << 10) #define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * Serial Port @@ -374,7 +374,6 @@ CONFIG_SYS_POST_ETHER | \ CONFIG_SYS_POST_SPR) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #define CONFIG_LOGBUFFER #define CONFIG_SYS_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */ diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h index 6da18ebca..7a6602ce3 100644 --- a/include/configs/TB5200.h +++ b/include/configs/TB5200.h @@ -126,7 +126,7 @@ #endif #ifdef CONFIG_POST -#define CONFIG__CMD_DIAG +#define CONFIG_CMD_DIAG #endif diff --git a/include/configs/XPEDITE1000.h b/include/configs/XPEDITE1000.h index f76ede3ce..8b47862d2 100644 --- a/include/configs/XPEDITE1000.h +++ b/include/configs/XPEDITE1000.h @@ -102,8 +102,7 @@ extern void out32(unsigned int, unsigned long); #define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ diff --git a/include/configs/acadia.h b/include/configs/acadia.h index b6f909c11..39f85ae3b 100644 --- a/include/configs/acadia.h +++ b/include/configs/acadia.h @@ -121,7 +121,13 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #else -#define CONFIG_SYS_NO_FLASH 1 /* No NOR on Acadia when NAND-booting */ +/* + * No NOR-flash on Acadia when NAND-booting. We need to undef the + * NOR device-tree fixup code as well, since flash_info is not defined + * in this case. + */ +#define CONFIG_SYS_NO_FLASH 1 +#undef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE #endif #ifdef CONFIG_ENV_IS_IN_FLASH diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 75106b427..70382914b 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -65,8 +65,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/ diff --git a/include/configs/barco.h b/include/configs/barco.h index e00f84aab..b1af70117 100644 --- a/include/configs/barco.h +++ b/include/configs/barco.h @@ -136,6 +136,8 @@ #define CONFIG_LOGBUFFER #ifdef CONFIG_LOGBUFFER #define CONFIG_SYS_STDOUT_ADDR 0x1FFC000 +#define CONFIG_SYS_POST_WORD_ADDR \ + (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE - 4) #else #define CONFIG_SYS_STDOUT_ADDR 0x2B9000 #endif diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 96704d77b..fc9784e08 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -265,6 +265,7 @@ #define FLASH_START_POST_BLOCK 11 /* Should > = 11 */ #define FLASH_END_POST_BLOCK 71 /* Should < = 71 */ #endif +#define CONFIG_SYS_POST_WORD_ADDR 0xFF903FFC /* These are for board tests */ #if 0 diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index 44762689c..91dcaccb4 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -50,6 +50,7 @@ # endif # ifdef CONFIG_POST # define CONFIG_CMD_DIAG +# define CONFIG_POST_ALT_LIST # endif # ifdef CONFIG_RTC_BFIN # define CONFIG_CMD_DATE diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h index 369b36894..26992e753 100644 --- a/include/configs/hcu4.h +++ b/include/configs/hcu4.h @@ -72,7 +72,7 @@ #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE #define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * Serial Port @@ -192,7 +192,6 @@ CONFIG_SYS_POST_SPR) #define CONFIG_SYS_POST_UART_TABLE {UART0_BASE} -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #undef CONFIG_LOGBUFFER #define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h index 10b1e0fee..f2ab50c75 100644 --- a/include/configs/hcu5.h +++ b/include/configs/hcu5.h @@ -83,7 +83,7 @@ #define CONFIG_SYS_INIT_RAM_END (4 << 10) #define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * Serial Port @@ -207,9 +207,8 @@ CONFIG_SYS_POST_FPU | \ CONFIG_SYS_POST_ETHER | \ CONFIG_SYS_POST_SPR) -#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE} -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) +#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE} #define CONFIG_SYS_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h index f9cdcbc3c..d40b7a9f5 100644 --- a/include/configs/hmi1001.h +++ b/include/configs/hmi1001.h @@ -190,14 +190,16 @@ /* Use ON-Chip SRAM until RAM will be available */ #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM -#ifdef CONFIG_POST + /* preserve space for the post_word at end of on-chip SRAM */ +#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4) + +#ifdef CONFIG_POST #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE #else #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE #endif - #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET diff --git a/include/configs/icon.h b/include/configs/icon.h index 779af25fa..ad0ca5d37 100644 --- a/include/configs/icon.h +++ b/include/configs/icon.h @@ -99,8 +99,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /* * Serial Port diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index c5b1565e3..69365e60b 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -200,14 +200,16 @@ /* Use ON-Chip SRAM until RAM will be available */ #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM -#ifdef CONFIG_POST + /* preserve space for the post_word at end of on-chip SRAM */ +#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4) + +#ifdef CONFIG_POST #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE #else #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE #endif - #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET diff --git a/include/configs/katmai.h b/include/configs/katmai.h index 884dd74a1..e4ccd7daf 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -98,8 +98,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * Serial Port diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index 937d7c5e2..37eaf8f6b 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -102,11 +102,10 @@ #if defined(CONFIG_SYS_INIT_DCACHE_CS) # define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -# define CONFIG_SYS_POST_ALT_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) +# define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) #else # define CONFIG_SYS_INIT_EXTRA_SIZE 16 # define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_INIT_EXTRA_SIZE) -# define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4) # define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_INIT_RAM_ADDR #endif /* defined(CONFIG_SYS_INIT_DCACHE_CS) */ diff --git a/include/configs/korat.h b/include/configs/korat.h index 0107a7b94..55ef4f033 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -85,7 +85,7 @@ #define CONFIG_SYS_INIT_RAM_END (4 << 10) #define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /* * Serial Port @@ -306,7 +306,6 @@ CONFIG_SYS_POST_SPR | \ CONFIG_SYS_POST_UART) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #define CONFIG_LOGBUFFER #define CONFIG_SYS_POST_CACHE_ADDR 0xC8000000 /* free virtual address */ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 9df6fc77f..72e02f87d 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -81,7 +81,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data*/ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_POST_ALT_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) +#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) /* unused GPT0 COMP reg */ #define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ /* 440EPx errata CHIP 11 */ diff --git a/include/configs/makalu.h b/include/configs/makalu.h index 83a2d4a65..905c71910 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -100,11 +100,10 @@ #if defined(CONFIG_SYS_INIT_DCACHE_CS) # define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -# define CONFIG_SYS_POST_ALT_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) +# define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) #else # define CONFIG_SYS_INIT_EXTRA_SIZE 16 # define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_INIT_EXTRA_SIZE) -# define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4) # define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_INIT_RAM_ADDR #endif /* defined(CONFIG_SYS_INIT_DCACHE_CS) */ diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h index 604298675..3e04cfe73 100644 --- a/include/configs/mcu25.h +++ b/include/configs/mcu25.h @@ -72,7 +72,7 @@ #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE #define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * Serial Port @@ -193,7 +193,6 @@ CONFIG_SYS_POST_SPR) #define CONFIG_SYS_POST_UART_TABLE {UART0_BASE} -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #undef CONFIG_LOGBUFFER #define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ diff --git a/include/configs/mpc5121-common.h b/include/configs/mpc5121-common.h index 96fab2093..afae1ab6d 100644 --- a/include/configs/mpc5121-common.h +++ b/include/configs/mpc5121-common.h @@ -30,8 +30,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes of initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h index 4f59cc6bd..d11d218c0 100644 --- a/include/configs/ocotea.h +++ b/include/configs/ocotea.h @@ -74,8 +74,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * Serial Port diff --git a/include/configs/redwood.h b/include/configs/redwood.h index 913db9480..3c1e882b0 100644 --- a/include/configs/redwood.h +++ b/include/configs/redwood.h @@ -91,8 +91,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * DDR SDRAM diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 900d1dbdc..988d41ff4 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -97,7 +97,7 @@ #define CONFIG_SYS_INIT_RAM_END (4 << 10) #define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /* * Serial Port @@ -353,7 +353,6 @@ CONFIG_SYS_POST_SPR | \ CONFIG_SYS_POST_UART) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #define CONFIG_LOGBUFFER #define CONFIG_SYS_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */ diff --git a/include/configs/taishan.h b/include/configs/taishan.h index ce4a61225..faf9e20bd 100644 --- a/include/configs/taishan.h +++ b/include/configs/taishan.h @@ -70,8 +70,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data*/ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * Serial Port diff --git a/include/configs/yucca.h b/include/configs/yucca.h index a54035518..4e64eec59 100644 --- a/include/configs/yucca.h +++ b/include/configs/yucca.h @@ -99,8 +99,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * Serial Port diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 6fbf38a32..aa250cc2d 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -259,9 +259,10 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 16) /* extra data in OCM */ -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4) -#define CONFIG_SYS_POST_MAGIC (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 8) -#define CONFIG_SYS_POST_VAL (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 12) +#define CONFIG_SYS_POST_MAGIC \ + (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 8) +#define CONFIG_SYS_POST_VAL \ + (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 12) /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup diff --git a/include/fdt_support.h b/include/fdt_support.h index 871ef4524..fd94929ce 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -79,7 +79,7 @@ void ft_pci_setup(void *blob, bd_t *bd); void set_working_fdt_addr(void *addr); int fdt_resize(void *blob); -int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size); +int fdt_fixup_nor_flash_size(void *blob); void fdt_fixup_mtdparts(void *fdt, void *node_info, int node_info_size); void fdt_del_node_and_alias(void *blob, const char *alias); diff --git a/include/image.h b/include/image.h index bcc08d1a7..18a9f0e96 100644 --- a/include/image.h +++ b/include/image.h @@ -83,6 +83,7 @@ #define IH_OS_ARTOS 19 /* ARTOS */ #define IH_OS_UNITY 20 /* Unity OS */ #define IH_OS_INTEGRITY 21 /* INTEGRITY */ +#define IH_OS_OSE 22 /* OSE */ /* * CPU Architecture Codes (supported by Linux) diff --git a/include/post.h b/include/post.h index 3da959d9a..625da5593 100644 --- a/include/post.h +++ b/include/post.h @@ -2,6 +2,10 @@ * (C) Copyright 2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * + * (C) Copyright 2010 + * Michael Zaidman, Kodak, michael.zaidman@kodak.com + * post_word_{load|store} cleanup. + * * See file CREDITS for list of people who contributed to this * project. * @@ -25,8 +29,59 @@ #ifndef __ASSEMBLY__ #include <common.h> +#include <asm/io.h> + +#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) + +#ifdef CONFIG_SYS_POST_WORD_ADDR +#define _POST_WORD_ADDR CONFIG_SYS_POST_WORD_ADDR +#else + +#ifdef CONFIG_MPC5xxx +#define _POST_WORD_ADDR (MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE) + +#elif defined(CONFIG_MPC512X) +#define _POST_WORD_ADDR \ + (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET - 0x4) + +#elif defined(CONFIG_8xx) +#define _POST_WORD_ADDR \ + (((immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + CPM_POST_WORD_ADDR) + +#elif defined(CONFIG_MPC8260) +#include <asm/cpm_8260.h> +#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) + +#elif defined(CONFIG_MPC8360) +#include <asm/immap_qe.h> +#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) + +#elif defined (CONFIG_MPC85xx) +#include <asm/cpm_85xx.h> +#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) + +#elif defined (CONFIG_4xx) +#define _POST_WORD_ADDR \ + (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #endif +#ifndef _POST_WORD_ADDR +#error "_POST_WORD_ADDR currently not implemented for this platform!" +#endif +#endif /* CONFIG_SYS_POST_WORD_ADDR */ + +static inline ulong post_word_load (void) +{ + return in_le32((volatile void *)(_POST_WORD_ADDR)); +} + +static inline void post_word_store (ulong value) +{ + out_le32((volatile void *)(_POST_WORD_ADDR), value); +} +#endif /* defined (CONFIG_POST) || defined(CONFIG_LOGBUFFER) */ +#endif /* __ASSEMBLY__ */ + #ifdef CONFIG_POST #define POST_POWERON 0x01 /* test runs on power-on booting */ @@ -40,7 +95,7 @@ #define POST_RAM 0x0200 /* test runs in RAM */ #define POST_MANUAL 0x0400 /* test runs on diag command */ #define POST_REBOOT 0x0800 /* test may cause rebooting */ -#define POST_PREREL 0x1000 /* test runs before relocation */ +#define POST_PREREL 0x1000 /* test runs before relocation */ #define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */ #define POST_STOP 0x4000 /* Interrupt POST sequence on fail */ |