diff options
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/M5208EVBE.h | 223 | ||||
| -rw-r--r-- | include/configs/M52277EVB.h | 26 | ||||
| -rw-r--r-- | include/configs/M53017EVB.h | 7 | ||||
| -rw-r--r-- | include/configs/M54451EVB.h | 73 | ||||
| -rw-r--r-- | include/configs/M54455EVB.h | 27 | ||||
| -rw-r--r-- | include/configs/MPC8536DS.h | 1 | ||||
| -rw-r--r-- | include/configs/MPC8544DS.h | 1 | ||||
| -rw-r--r-- | include/configs/MPC8572DS.h | 1 | ||||
| -rw-r--r-- | include/configs/P2020DS.h | 1 | ||||
| -rw-r--r-- | include/configs/amcc-common.h | 13 | ||||
| -rw-r--r-- | include/configs/at91rm9200dk.h | 5 | ||||
| -rw-r--r-- | include/configs/at91rm9200ek.h | 5 | ||||
| -rw-r--r-- | include/configs/cmc_pu2.h | 5 | ||||
| -rw-r--r-- | include/configs/csb637.h | 5 | ||||
| -rw-r--r-- | include/configs/digsy_mtc.h | 120 | ||||
| -rw-r--r-- | include/configs/m501sk.h | 5 | ||||
| -rw-r--r-- | include/configs/mp2usb.h | 5 | ||||
| -rw-r--r-- | include/configs/omap3_beagle.h | 3 | ||||
| -rw-r--r-- | include/configs/omap3_evm.h | 3 | ||||
| -rw-r--r-- | include/configs/omap3_overo.h | 3 | ||||
| -rw-r--r-- | include/configs/omap3_pandora.h | 3 | ||||
| -rw-r--r-- | include/configs/omap3_zoom1.h | 3 | ||||
| -rw-r--r-- | include/configs/omap3_zoom2.h | 3 | ||||
| -rw-r--r-- | include/configs/sheevaplug.h | 1 |
24 files changed, 393 insertions, 149 deletions
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h new file mode 100644 index 000000000..32123d2f5 --- /dev/null +++ b/include/configs/M5208EVBE.h @@ -0,0 +1,223 @@ +/* + * Configuation settings for the Freescale MCF5208EVBe. + * + * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _M5208EVBE_H +#define _M5208EVBE_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_MCF520x /* define processor family */ +#define CONFIG_M5208 /* define processor type */ + +#define CONFIG_MCFUART +#define CONFIG_SYS_UART_PORT (0) +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } + +#undef CONFIG_WATCHDOG +#define CONFIG_WATCHDOG_TIMEOUT 5000 + +/* Command line configuration */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FLASH +#undef CONFIG_CMD_I2C +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MISC +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_REGINFO + +#define CONFIG_MCFFEC +#ifdef CONFIG_MCFFEC +# define CONFIG_NET_MULTI 1 +# define CONFIG_MII 1 +# define CONFIG_MII_INIT 1 +# define CONFIG_SYS_DISCOVER_PHY +# define CONFIG_SYS_RX_ETH_BUFFER 8 +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_HAS_ETH1 + +# define CONFIG_SYS_FEC0_PINMUX 0 +# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE +# define MCFFEC_TOUT_LOOP 50000 +/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ +# ifndef CONFIG_SYS_DISCOVER_PHY +# define FECDUPLEX FULL +# define FECSPEED _100BASET +# else +# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# endif +# endif /* CONFIG_SYS_DISCOVER_PHY */ +#endif + +/* Timer */ +#define CONFIG_MCFTMR +#undef CONFIG_MCFPIT + +/* I2C */ +#define CONFIG_FSL_I2C +#define CONFIG_HARD_I2C /* I2C with hw support */ +#undef CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SPEED 80000 +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR + +#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ +#define CONFIG_UDP_CHECKSUM + +#ifdef CONFIG_MCFFEC +# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 +# define CONFIG_IPADDR 192.162.1.2 +# define CONFIG_NETMASK 255.255.255.0 +# define CONFIG_SERVERIP 192.162.1.1 +# define CONFIG_GATEWAYIP 192.162.1.1 +# define CONFIG_OVERWRITE_ETHADDR_ONCE +#endif /* CONFIG_MCFFEC */ + +#define CONFIG_HOSTNAME M5208EVBe +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "loadaddr=40010000\0" \ + "u-boot=u-boot.bin\0" \ + "load=tftp ${loadaddr) ${u-boot}\0" \ + "upd=run load; run prog\0" \ + "prog=prot off 0 3ffff;" \ + "era 0 3ffff;" \ + "cp.b ${loadaddr} 0 ${filesize};" \ + "save\0" \ + "" + +#define CONFIG_PRAM 512 /* 512 KB */ +#define CONFIG_SYS_PROMPT "-> " +#define CONFIG_SYS_LONGHELP /* undef to save memory */ + +#ifdef CONFIG_CMD_KGDB +# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#endif + +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */ +#define CONFIG_SYS_LOAD_ADDR 0x40010000 + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */ +#define CONFIG_SYS_PLL_ODR 0x36 +#define CONFIG_SYS_PLL_FDR 0x7D + +#define CONFIG_SYS_MBAR 0xFC000000 + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ +/* Definitions for initial stack pointer and data area (in DPRAM) */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 +#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in internal SRAM */ +#define CONFIG_SYS_INIT_RAM_CTRL 0x221 +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +/* + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ +#define CONFIG_SYS_SDRAM_CFG1 0x43711630 +#define CONFIG_SYS_SDRAM_CFG2 0x56670000 +#define CONFIG_SYS_SDRAM_CTRL 0xE1002000 +#define CONFIG_SYS_SDRAM_EMOD 0x80010000 +#define CONFIG_SYS_SDRAM_MODE 0x00CD0000 + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 +#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) + +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ + +#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 +#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization ?? + */ +#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) + +/* FLASH organization */ +#define CONFIG_SYS_FLASH_CFI +#ifdef CONFIG_SYS_FLASH_CFI +# define CONFIG_FLASH_CFI_DRIVER 1 +# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ +# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +# define CONFIG_SYS_MAX_FLASH_SECT 254 /* max number of sectors on one chip */ +# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ +#endif + +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE + +/* + * Configuration for environment + * Environment is embedded in u-boot in the second sector of the flash + */ +#define CONFIG_ENV_OFFSET 0x2000 +#define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_ENV_SECT_SIZE 0x2000 +#define CONFIG_ENV_IS_IN_FLASH 1 + +/* Cache Configuration */ +#define CONFIG_SYS_CACHELINE_SIZE 16 + +/* Chipselect bank definitions */ +/* + * CS0 - NOR Flash + * CS1 - Available + * CS2 - Available + * CS3 - Available + * CS4 - Available + * CS5 - Available + */ +#define CONFIG_SYS_CS0_BASE 0 +#define CONFIG_SYS_CS0_MASK 0x007F0001 +#define CONFIG_SYS_CS0_CTRL 0x00001FA0 + +#endif /* _M5208EVBE_H */ diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 053a914eb..e7db0cc10 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -154,26 +154,22 @@ #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR /* DSPI and Serial Flash */ +#define CONFIG_CF_SPI #define CONFIG_CF_DSPI #define CONFIG_HARD_SPI -#define CONFIG_SYS_SER_FLASH_BASE 0x01000000 #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI # define CONFIG_SYS_DSPI_CS2 # define CONFIG_SPI_FLASH # define CONFIG_SPI_FLASH_STMICRO -# define CONFIG_SYS_DSPI_DCTAR0 (DSPI_DCTAR_TRSZ(7) | \ - DSPI_DCTAR_CPOL | \ - DSPI_DCTAR_CPHA | \ - DSPI_DCTAR_PCSSCK_1CLK | \ - DSPI_DCTAR_PASC(0) | \ - DSPI_DCTAR_PDT(0) | \ - DSPI_DCTAR_CSSCK(0) | \ - DSPI_DCTAR_ASC(0) | \ - DSPI_DCTAR_PBR(0) | \ - DSPI_DCTAR_DT(1) | \ - DSPI_DCTAR_BR(1)) +# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ + DSPI_CTAR_PCSSCK_1CLK | \ + DSPI_CTAR_PASC(0) | \ + DSPI_CTAR_PDT(0) | \ + DSPI_CTAR_CSSCK(0) | \ + DSPI_CTAR_ASC(0) | \ + DSPI_CTAR_DT(1)) #endif /* Input, PCI, Flexbus, and VCO */ @@ -265,9 +261,7 @@ * FLASH organization */ #ifdef CONFIG_SYS_STMICRO_BOOT -# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SER_FLASH_BASE -# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_SER_FLASH_BASE -# define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS0_BASE +# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE # define CONFIG_ENV_OFFSET 0x30000 # define CONFIG_ENV_SIZE 0x1000 # define CONFIG_ENV_SECT_SIZE 0x10000 @@ -283,6 +277,8 @@ #define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_FLASH_CFI_DRIVER 1 +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 +# define CONFIG_FLASH_SPANSION_S29WS_N 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 07c85c4f5..30855bdaa 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -77,6 +77,9 @@ # define CONFIG_SYS_FEC1_PINMUX 0 # define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE # define MCFFEC_TOUT_LOOP 50000 + +# define CONFIG_BOOTARGS "root=/dev/mtdblock3 rw rootfstype=jffs2" + /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL @@ -204,7 +207,9 @@ #define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 +# define CONFIG_FLASH_SPANSION_S29WS_N 1 +# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 45f701652..fa444c39e 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -70,6 +70,7 @@ #define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_NET +#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SPI @@ -93,7 +94,7 @@ # define MCFFEC_TOUT_LOOP 50000 # define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ -# define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" +# define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)" # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 # define CONFIG_ETHPRIME "FEC0" # define CONFIG_IPADDR 192.162.1.2 @@ -163,35 +164,33 @@ #define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_OFFSET 0x58000 -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR +#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR /* DSPI and Serial Flash */ +#define CONFIG_CF_SPI #define CONFIG_CF_DSPI #define CONFIG_SERIAL_FLASH #define CONFIG_HARD_SPI -#define CONFIG_SYS_SER_FLASH_BASE 0x01000000 #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI # define CONFIG_SPI_FLASH # define CONFIG_SPI_FLASH_STMICRO -# define CONFIG_SYS_DSPI_DCTAR0 (DSPI_DCTAR_TRSZ(7) | \ - DSPI_DCTAR_CPOL | \ - DSPI_DCTAR_CPHA | \ - DSPI_DCTAR_PCSSCK_1CLK | \ - DSPI_DCTAR_PASC(0) | \ - DSPI_DCTAR_PDT(0) | \ - DSPI_DCTAR_CSSCK(0) | \ - DSPI_DCTAR_ASC(0) | \ - DSPI_DCTAR_PBR(0) | \ - DSPI_DCTAR_DT(1) | \ - DSPI_DCTAR_BR(1)) +# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ + DSPI_CTAR_PCSSCK_1CLK | \ + DSPI_CTAR_PASC(0) | \ + DSPI_CTAR_PDT(0) | \ + DSPI_CTAR_CSSCK(0) | \ + DSPI_CTAR_ASC(0) | \ + DSPI_CTAR_DT(1)) +# define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0) +# define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0) #endif /* Input, PCI, Flexbus, and VCO */ #define CONFIG_EXTRA_CLOCK -#define CONFIG_PRAM 2048 /* 2048 KB */ +#define CONFIG_PRAM 2048 /* 2048 KB */ #define CONFIG_SYS_PROMPT "-> " #define CONFIG_SYS_LONGHELP /* undef to save memory */ @@ -209,7 +208,7 @@ #define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_MBAR 0xFC000000 +#define CONFIG_SYS_MBAR 0xFC000000 /* * Low Level Configuration Settings @@ -265,7 +264,7 @@ /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ -#if defined(CONFIG_CF_SBF) +#if defined(CONFIG_SYS_STMICRO_BOOT) # define CONFIG_ENV_IS_IN_SPI_FLASH 1 # define CONFIG_ENV_SPI_CS 1 # define CONFIG_ENV_OFFSET 0x20000 @@ -273,30 +272,21 @@ # define CONFIG_ENV_SECT_SIZE 0x10000 #else # define CONFIG_ENV_IS_IN_FLASH 1 -# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x4000) -# define CONFIG_ENV_SECT_SIZE 0x2000 +# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000) +# define CONFIG_ENV_SIZE 0x2000 +# define CONFIG_ENV_SECT_SIZE 0x8000 #endif #undef CONFIG_ENV_OVERWRITE #undef CONFIG_ENV_IS_EMBEDDED -/*----------------------------------------------------------------------- - * FLASH organization - */ -#ifdef CONFIG_SYS_STMICRO_BOOT -# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SER_FLASH_BASE -# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_SER_FLASH_BASE -# define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS0_BASE -#endif -#ifdef CONFIG_SYS_SPANSION_BOOT -# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_SER_FLASH_BASE -#endif +/* FLASH organization */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE #define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_FLASH_CFI_DRIVER 1 +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ @@ -311,27 +301,20 @@ * This is setting for JFFS2 support in u-boot. * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. */ -#ifdef CONFIG_SYS_SPANSION_BOOT -# define CONFIG_JFFS2_DEV "nor0" -# define CONFIG_JFFS2_PART_SIZE 0x01000000 -# define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x500000) -#endif -#ifdef CONFIG_SYS_STMICRO_BOOT +#ifdef CONFIG_CMD_JFFS2 # define CONFIG_JFFS2_DEV "nor0" # define CONFIG_JFFS2_PART_SIZE 0x01000000 # define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x500000) #endif -/*----------------------------------------------------------------------- - * Cache Configuration - */ +/* Cache Configuration */ #define CONFIG_SYS_CACHELINE_SIZE 16 /*----------------------------------------------------------------------- * Memory bank definitions */ /* - * CS0 - NOR Flash 8MB + * CS0 - NOR Flash 16MB * CS1 - Available * CS2 - Available * CS3 - Available @@ -339,10 +322,10 @@ * CS5 - Available */ - /* SPANSION Flash */ + /* Flash */ #define CONFIG_SYS_CS0_BASE 0x00000000 -#define CONFIG_SYS_CS0_MASK 0x007F0001 -#define CONFIG_SYS_CS0_CTRL 0x00001180 +#define CONFIG_SYS_CS0_MASK 0x00FF0001 +#define CONFIG_SYS_CS0_CTRL 0x00004D80 #define CONFIG_SYS_SPANSION_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 87f3a73ae..14d98d69c 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -200,25 +200,21 @@ #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR /* DSPI and Serial Flash */ +#define CONFIG_CF_SPI #define CONFIG_CF_DSPI #define CONFIG_HARD_SPI -#define CONFIG_SYS_SER_FLASH_BASE 0x01000000 #define CONFIG_SYS_SBFHDR_SIZE 0x13 #ifdef CONFIG_CMD_SPI # define CONFIG_SPI_FLASH # define CONFIG_SPI_FLASH_STMICRO -# define CONFIG_SYS_DSPI_DCTAR0 (DSPI_DCTAR_TRSZ(7) | \ - DSPI_DCTAR_CPOL | \ - DSPI_DCTAR_CPHA | \ - DSPI_DCTAR_PCSSCK_1CLK | \ - DSPI_DCTAR_PASC(0) | \ - DSPI_DCTAR_PDT(0) | \ - DSPI_DCTAR_CSSCK(0) | \ - DSPI_DCTAR_ASC(0) | \ - DSPI_DCTAR_PBR(0) | \ - DSPI_DCTAR_DT(1) | \ - DSPI_DCTAR_BR(1)) +# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ + DSPI_CTAR_PCSSCK_1CLK | \ + DSPI_CTAR_PASC(0) | \ + DSPI_CTAR_PDT(0) | \ + DSPI_CTAR_CSSCK(0) | \ + DSPI_CTAR_ASC(0) | \ + DSPI_CTAR_DT(1)) #endif /* PCI */ @@ -342,10 +338,8 @@ * FLASH organization */ #ifdef CONFIG_SYS_STMICRO_BOOT -# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SER_FLASH_BASE -# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_SER_FLASH_BASE -# define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_SYS_FLASH2_BASE CONFIG_SYS_CS1_BASE +# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE +# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS1_BASE # define CONFIG_ENV_OFFSET 0x30000 # define CONFIG_ENV_SIZE 0x2000 # define CONFIG_ENV_SECT_SIZE 0x10000 @@ -370,6 +364,7 @@ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_FLASH_CFI_DRIVER 1 +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT # define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 0aaab4a4a..9d2b8600c 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -534,7 +534,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -#define CONFIG_CMD_BEDBUG #define CONFIG_CMD_NET #endif diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 2de313931..0caf45603 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -433,7 +433,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI - #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_NET #define CONFIG_CMD_SCSI #define CONFIG_CMD_EXT2 diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 64f5c4b75..d0933bae9 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -585,7 +585,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -#define CONFIG_CMD_BEDBUG #define CONFIG_CMD_NET #define CONFIG_CMD_SCSI #define CONFIG_CMD_EXT2 diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 5c2c5cb32..ad24e0c88 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -614,7 +614,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -#define CONFIG_CMD_BEDBUG #define CONFIG_CMD_NET #define CONFIG_CMD_SCSI #define CONFIG_CMD_EXT2 diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index 3b733c03e..a2b7ee8cf 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -137,10 +137,11 @@ /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. + * have to be in the first 16 MB of memory, since this is + * the maximum mapped by the 40x Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* * Internal Definitions @@ -214,9 +215,9 @@ " console=" xstr(CONFIG_USE_TTY) ",${baudrate}\0" \ CONFIG_ADDMISC \ "initrd_high=30000000\0" \ - "kernel_addr_r=400000\0" \ - "fdt_addr_r=800000\0" \ - "ramdisk_addr_r=C00000\0" \ + "kernel_addr_r=1000000\0" \ + "fdt_addr_r=1800000\0" \ + "ramdisk_addr_r=1900000\0" \ "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ "ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \ diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 2017b666a..590c69a19 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -45,11 +45,6 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 -#define CONFIG_SYS_MC_PUP_VAL 0x00000000 -#define CONFIG_SYS_MC_PUER_VAL 0x00000000 -#define CONFIG_SYS_MC_ASR_VAL 0x00000000 -#define CONFIG_SYS_MC_AASR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 58ec94a84..b4f075ebc 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -56,11 +56,6 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 -#define CONFIG_SYS_MC_PUP_VAL 0x00000000 -#define CONFIG_SYS_MC_PUER_VAL 0x00000000 -#define CONFIG_SYS_MC_ASR_VAL 0x00000000 -#define CONFIG_SYS_MC_AASR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h index 80559bf19..be478b24e 100644 --- a/include/configs/cmc_pu2.h +++ b/include/configs/cmc_pu2.h @@ -44,11 +44,6 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 -#define CONFIG_SYS_MC_PUP_VAL 0x00000000 -#define CONFIG_SYS_MC_PUER_VAL 0x00000000 -#define CONFIG_SYS_MC_ASR_VAL 0x00000000 -#define CONFIG_SYS_MC_AASR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */ diff --git a/include/configs/csb637.h b/include/configs/csb637.h index 7a5769696..f4fd808e4 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -45,11 +45,6 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 -#define CONFIG_SYS_MC_PUP_VAL 0x00000000 -#define CONFIG_SYS_MC_PUER_VAL 0x00000000 -#define CONFIG_SYS_MC_ASR_VAL 0x00000000 -#define CONFIG_SYS_MC_AASR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 6ccebfaf8..2bdaaace3 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -114,29 +114,109 @@ #undef CONFIG_BOOTARGS -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "console=ttyPSC0\0" \ - "kernel_addr_r=400000\0" \ - "fdt_addr_r=600000\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:"\ - "${netmask}:${hostname}:${netdev}:off panic=1\0" \ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fw_image=digsyMPC.img\0" \ + "mtcb_start=mtc led diag orange; run mtcb_1\0" \ + "mtcb_clearled=for x in user1 user2 usbpwr usbbusy; " \ + "do mtc led $x; done\0" \ + "mtcb_1=if mtc key; then run mtcb_clearled mtcb_update; " \ + "else run mtcb_fw; fi\0" \ + "mtcb_fw=if bootm ff000000; then echo FIRMWARE OK!; " \ + "else echo BAD FIRMWARE CRC!; mtc led diag red; fi\0" \ + "mtcb_update=mtc led user1 orange;" \ + "while mtc key; do ; done; run mtcb_2;\0" \ + "mtcb_2=mtc led user1 green 2; usb reset; run mtcb_usb1;\0" \ + "mtcb_usb1=if fatload usb 0 400000 script.img; " \ + "then run mtcb_doscript; else run mtcb_usb2; fi\0" \ + "mtcb_usb2=if fatload usb 0 400000 $fw_image; " \ + "then run mtcb_dousb; else run mtcb_ide; fi\0" \ + "mtcb_doscript=run mtcb_usbleds; mtc led user2 orange 2; " \ + "run mtcb_wait_flickr mtcb_ds_1;\0" \ + "mtcb_ds_1=if imi 400000; then mtc led usbbusy; " \ + "source 400000; else run mtcb_error; fi\0" \ + "mtcb_dousb=run mtcb_usbleds mtcb_wait_flickr mtcb_du_1;\0" \ + "mtcb_du_1=if imi 400000; then run mtcb_du_2; " \ + "else run mtcb_error; fi\0" \ + "mtcb_du_2=run mtcb_clear mtcb_prog; mtc led usbbusy; " \ + "run mtcb_checkfw\0" \ + "mtcb_checkfw=if imi ff000000; then run mtcb_success; " \ + "else run mtcb_error; fi\0" \ + "mtcb_waitkey=mtc key; until test $? -eq 0; do mtc key; done\0" \ + "mtcb_wait_flickr=run mtcb_waitkey mtcb_uledflckr\0" \ + "mtcb_usbleds=mtc led usbpwr green; mtc led usbbusy orange 1;\0"\ + "mtcb_uledflckr=mtc led user1 orange 11\0" \ + "mtcb_error=mtc led user1 red\0" \ + "mtcb_clear=erase ff000000 ff0fffff\0" \ + "mtcb_prog=cp.b 400000 ff000000 ${filesize}\0" \ + "mtcb_success=mtc led user1 green\0" \ + "mtcb_ide=if fatload ide 0 400000 $fw_image;" \ + "then run mtcb_doide; else run mtcb_error; fi\0" \ + "mtcb_doide=mtc led user2 green 1;" \ + "run mtcb_wait_flickr mtcb_di_1;\0" \ + "mtcb_di_1=if imi 400000; then run mtcb_di_2;" \ + "else run mtcb_error; fi\0" \ + "mtcb_di_2=run mtcb_clear; run mtcb_prog mtcb_checkfw\0" \ + "ramdisk_num_sector=16\0" \ + "flash_base=ff000000\0" \ + "flashdisk_size=e00000\0" \ + "env_sector=fff60000\0" \ + "flashdisk_start=ff100000\0" \ + "load_cmd=tftp 400000 digsyMPC.img\0" \ + "clear_cmd=erase ff000000 ff0fffff\0" \ + "flash_cmd=cp.b 400000 ff000000 ${filesize}\0" \ + "update_cmd=run load_cmd; " \ + "iminfo 400000; " \ + "run clear_cmd flash_cmd; " \ + "iminfo ff000000\0" \ + "spi_driver=yes\0" \ + "spi_watchdog=no\0" \ + "ftps_start=yes\0" \ + "ftps_user1=admin\0" \ + "ftps_pass1=admin\0" \ + "ftps_base1=/\0" \ + "ftps_home1=/\0" \ + "plc_sio_srv=no\0" \ + "plc_sio_baud=57600\0" \ + "plc_sio_parity=no\0" \ + "plc_sio_stop=1\0" \ + "plc_sio_com=2\0" \ + "plc_eth_srv=yes\0" \ + "plc_eth_port=1200\0" \ + "plc_root=/ide/\0" \ + "diag_level=0\0" \ + "webvisu=no\0" \ + "plc_can1_routing=no\0" \ + "plc_can1_baudrate=250\0" \ + "plc_can2_routing=no\0" \ + "plc_can2_baudrate=250\0" \ + "plc_can3_routing=no\0" \ + "plc_can3_baudrate=250\0" \ + "plc_can4_routing=no\0" \ + "plc_can4_baudrate=250\0" \ + "netdev=eth0\0" \ + "console=ttyPSC0\0" \ + "kernel_addr_r=400000\0" \ + "fdt_addr_r=600000\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:" \ + "${netmask}:${hostname}:${netdev}:off panic=1\0" \ "addcons=setenv bootargs ${bootargs} console=${console},${baudrate}\0"\ - "rootpath=/opt/eldk/ppc_6xx\0" \ - "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ - "tftp ${fdt_addr_r} ${fdt_file};" \ - "run nfsargs addip addcons;" \ - "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ - "load=tftp 200000 ${u-boot}\0" \ - "update=protect off FFF00000 +${filesize};" \ - "erase FFF00000 +${filesize};" \ - "cp.b 200000 FFF00000 ${filesize};" \ - "protect on FFF00000 +${filesize}\0" \ + "rootpath=/opt/eldk/ppc_6xx\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ + "tftp ${fdt_addr_r} ${fdt_file};" \ + "run nfsargs addip addcons;" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "load=tftp 200000 ${u-boot}\0" \ + "update=protect off FFF00000 +${filesize};" \ + "erase FFF00000 +${filesize};" \ + "cp.b 200000 FFF00000 ${filesize};" \ + "protect on FFF00000 +${filesize}\0" \ "" +#define CONFIG_BOOTCOMMAND "run mtcb_start" + /* * SPI configuration */ diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h index 32a8194a2..5c066426c 100644 --- a/include/configs/m501sk.h +++ b/include/configs/m501sk.h @@ -46,11 +46,6 @@ */ #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 -#define CONFIG_SYS_MC_PUP_VAL 0x00000000 -#define CONFIG_SYS_MC_PUER_VAL 0x00000000 -#define CONFIG_SYS_MC_ASR_VAL 0x00000000 -#define CONFIG_SYS_MC_AASR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index ac678d0b6..0c2ee6057 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -49,11 +49,6 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 -#define CONFIG_SYS_MC_PUP_VAL 0x00000000 -#define CONFIG_SYS_MC_PUER_VAL 0x00000000 -#define CONFIG_SYS_MC_ASR_VAL 0x00000000 -#define CONFIG_SYS_MC_AASR_VAL 0x00000000 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define CONFIG_SYS_SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 8fc6fb26c..61629f8c4 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -300,8 +300,7 @@ #define CONFIG_SYS_JFFS2_NUM_BANKS 1 #ifndef __ASSEMBLY__ -extern gpmc_csx_t *nand_cs_base; -extern gpmc_t *gpmc_cfg_base; +extern struct gpmc *gpmc_cfg; extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; extern unsigned int boot_flash_off; diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 809198b0f..9f0f34bd8 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -292,8 +292,7 @@ #define CONFIG_SYS_JFFS2_NUM_BANKS 1 #ifndef __ASSEMBLY__ -extern gpmc_csx_t *nand_cs_base; -extern gpmc_t *gpmc_cfg_base; +extern struct gpmc *gpmc_cfg; extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; extern unsigned int boot_flash_off; diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index c359c60b1..07a031bc8 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -285,8 +285,7 @@ #define CONFIG_SYS_JFFS2_NUM_BANKS 1 #ifndef __ASSEMBLY__ -extern gpmc_csx_t *nand_cs_base; -extern gpmc_t *gpmc_cfg_base; +extern struct gpmc *gpmc_cfg; extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; extern unsigned int boot_flash_off; diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index d7b1cc189..1cfd7e969 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -289,8 +289,7 @@ #define CONFIG_SYS_JFFS2_NUM_BANKS 1 #ifndef __ASSEMBLY__ -extern gpmc_csx_t *nand_cs_base; -extern gpmc_t *gpmc_cfg_base; +extern struct gpmc *gpmc_cfg; extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; extern unsigned int boot_flash_off; diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 676b42547..61a41e725 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -297,8 +297,7 @@ #define CONFIG_SYS_JFFS2_NUM_BANKS 1 #ifndef __ASSEMBLY__ -extern gpmc_csx_t *nand_cs_base; -extern gpmc_t *gpmc_cfg_base; +extern struct gpmc *gpmc_cfg; extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; extern unsigned int boot_flash_off; diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index 3f6f5451a..03f92f58e 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -252,8 +252,7 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) #ifndef __ASSEMBLY__ -extern gpmc_csx_t *nand_cs_base; -extern gpmc_t *gpmc_cfg_base; +extern struct gpmc *gpmc_cfg; extern unsigned int boot_flash_base; extern volatile unsigned int boot_flash_env_addr; extern unsigned int boot_flash_off; diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index fc401a8f8..1f95a3ced 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -107,6 +107,7 @@ #define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */ #define NAND_ALLOW_ERASE_ALL 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* |