diff options
Diffstat (limited to 'include/configs')
31 files changed, 72 insertions, 87 deletions
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 984189389..d03c05bf3 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -132,6 +132,9 @@ * NAND-FLASH stuff *----------------------------------------------------------------------- */ + +#define CFG_NAND_LEGACY + #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/BMW.h b/include/configs/BMW.h index 050054d27..3bd43d836 100644 --- a/include/configs/BMW.h +++ b/include/configs/BMW.h @@ -69,6 +69,10 @@ CFG_CMD_DOC | \ CFG_CMD_ELF | \ 0 ) + +/* CFG_CMD_DOC required legacy NAND support */ +#define CFG_NAND_LEGACY + #if 0 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | \ CFG_CMD_PCI | CFG_CMD_DOC | CFG_CMD_DATE) diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 6025886e3..1cca2859f 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -81,6 +81,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index efc3adaec..047e2f1ee 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -79,6 +79,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index 1347f2afc..d756f447f 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -100,6 +100,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 9d5281509..852d94a41 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -87,6 +87,9 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + + #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index 946a0fd19..2260327c3 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -98,6 +98,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index 16a9ea5dd..1e9a99eed 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -178,6 +178,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + /* * Miscellaneous configurable options */ diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h index a23d7e50b..9a98e5c19 100644 --- a/include/configs/CPU87.h +++ b/include/configs/CPU87.h @@ -189,6 +189,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + /* * Miscellaneous configurable options */ diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h index de8f7ae71..6613f90a7 100644 --- a/include/configs/GEN860T.h +++ b/include/configs/GEN860T.h @@ -284,6 +284,8 @@ */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + /* * Verbose help from command monitor. */ diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 131c21555..41a35d2c5 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -122,6 +122,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + #undef CONFIG_BZIP2 /* include support for bzip2 compressed images */ #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index eb627e881..f84e35621 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -135,6 +135,8 @@ * NAND-FLASH stuff *----------------------------------------------------------------------- */ +#define CFG_NAND_LEGACY + #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index db2147b48..1f01e7be0 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -87,6 +87,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + #define CFG_HUSH_PARSER #define CFG_PROMPT_HUSH_PS2 "> " /************************************************************** diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index bf4c89959..444f721cc 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -491,6 +491,7 @@ /****************************************************************/ /* NAND */ +#define CFG_NAND_LEGACY #define CFG_NAND_BASE NAND_BASE #define CONFIG_MTD_NAND_ECC_JFFS2 #define CONFIG_MTD_NAND_VERIFY_WRITE diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index 529cb4cba..e20e72495 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -491,6 +491,7 @@ /****************************************************************/ /* NAND */ +#define CFG_NAND_LEGACY #define CFG_NAND_BASE NAND_BASE #define CONFIG_MTD_NAND_ECC_JFFS2 #define CONFIG_MTD_NAND_VERIFY_WRITE diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h index dc6b15fcd..e30be0987 100644 --- a/include/configs/NETVIA.h +++ b/include/configs/NETVIA.h @@ -387,6 +387,8 @@ /*****************************************************************************/ +#define CFG_NAND_LEGACY + #if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2 /* NAND */ diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h index d03706e19..3a97fbcbd 100644 --- a/include/configs/PCIPPC2.h +++ b/include/configs/PCIPPC2.h @@ -77,6 +77,7 @@ */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY /* * Miscellaneous configurable options diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index 92b2f7cf8..130beb78e 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -79,6 +79,7 @@ */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY /* * Miscellaneous configurable options diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 9668fb0ce..091b768a9 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -69,6 +69,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + #define CFG_HUSH_PARSER #define CFG_PROMPT_HUSH_PS2 "> " /************************************************************** diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 54ecfa4c5..dd5d83168 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -160,6 +160,8 @@ * NAND-FLASH stuff *----------------------------------------------------------------------- */ +#define CFG_NAND_LEGACY + #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/PM520.h b/include/configs/PM520.h index e73ad5100..9c241e67e 100644 --- a/include/configs/PM520.h +++ b/include/configs/PM520.h @@ -101,6 +101,8 @@ #define ADD_DOC_CMD 0 #else #define ADD_DOC_CMD CFG_CMD_DOC +/* DoC requires legacy NAND for now */ +#define CFG_NAND_LEGACY #endif /* diff --git a/include/configs/PM826.h b/include/configs/PM826.h index 6e5e3bbe1..88fdb51ad 100644 --- a/include/configs/PM826.h +++ b/include/configs/PM826.h @@ -180,6 +180,8 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY + /* * Disk-On-Chip configuration */ diff --git a/include/configs/PM828.h b/include/configs/PM828.h index 982a1f814..37ee9771b 100644 --- a/include/configs/PM828.h +++ b/include/configs/PM828.h @@ -183,6 +183,7 @@ /* * Disk-On-Chip configuration */ +#define CFG_NAND_LEGACY #define CFG_DOC_SHORT_TIMEOUT #define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index c406c8f4b..88e6db491 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -188,36 +188,31 @@ * NAND-FLASH stuff *----------------------------------------------------------------------- */ +/* + * nand device 1 on dave (PPChameleonEVB) needs more time, + * so we just introduce additional wait in nand_wait(), + * effectively for both devices. + */ +#define PPCHAMELON_NAND_TIMER_HACK -/* Use the new NAND code. (BOARDLIBS = drivers/nand/libnand.a required) */ -#define CONFIG_NEW_NAND_CODE #define CFG_NAND0_BASE 0xFF400000 #define CFG_NAND1_BASE 0xFF000000 #define CFG_NAND_BASE_LIST { CFG_NAND0_BASE, CFG_NAND1_BASE } #define NAND_BIG_DELAY_US 25 #define CFG_MAX_NAND_DEVICE 2 /* Max number of NAND devices */ -#define SECTORSIZE 512 -#define NAND_NO_RB -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 #define NAND_MAX_CHIPS 1 #define CFG_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */ +#define CFG_NAND0_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */ #define CFG_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CFG_NAND0_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ -#define CFG_NAND0_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */ #define CFG_NAND1_CE (0x80000000 >> 14) /* our CE is GPIO14 */ +#define CFG_NAND1_RDY (0x80000000 >> 31) /* our RDY is GPIO31 */ #define CFG_NAND1_CLE (0x80000000 >> 15) /* our CLE is GPIO15 */ #define CFG_NAND1_ALE (0x80000000 >> 16) /* our ALE is GPIO16 */ -#define CFG_NAND1_RDY (0x80000000 >> 31) /* our RDY is GPIO31 */ -#ifdef CONFIG_NEW_NAND_CODE #define MACRO_NAND_DISABLE_CE(nandptr) do \ { \ switch((unsigned long)nandptr) \ @@ -293,83 +288,19 @@ break; \ } \ } while(0) -#else -#define NAND_DISABLE_CE(nand) do \ -{ \ - switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \ - { \ - case CFG_NAND0_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CE); \ - break; \ - case CFG_NAND1_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND1_CE); \ - break; \ - } \ -} while(0) -#define NAND_ENABLE_CE(nand) do \ -{ \ - switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \ - { \ - case CFG_NAND0_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND0_CE); \ - break; \ - case CFG_NAND1_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND1_CE); \ - break; \ - } \ -} while(0) +#if 0 +#define SECTORSIZE 512 +#define NAND_NO_RB -#define NAND_CTL_CLRALE(nandptr) do \ -{ \ - switch((unsigned long)nandptr) \ - { \ - case CFG_NAND0_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND0_ALE); \ - break; \ - case CFG_NAND1_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND1_ALE); \ - break; \ - } \ -} while(0) +#define ADDR_COLUMN 1 +#define ADDR_PAGE 2 +#define ADDR_COLUMN_PAGE 3 -#define NAND_CTL_SETALE(nandptr) do \ -{ \ - switch((unsigned long)nandptr) \ - { \ - case CFG_NAND0_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_ALE); \ - break; \ - case CFG_NAND1_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND1_ALE); \ - break; \ - } \ -} while(0) +#define NAND_ChipID_UNKNOWN 0x00 +#define NAND_MAX_FLOORS 1 -#define NAND_CTL_CLRCLE(nandptr) do \ -{ \ - switch((unsigned long)nandptr) \ - { \ - case CFG_NAND0_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND0_CLE); \ - break; \ - case CFG_NAND1_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND1_CLE); \ - break; \ - } \ -} while(0) -#define NAND_CTL_SETCLE(nandptr) do { \ - switch((unsigned long)nandptr) { \ - case CFG_NAND0_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CLE); \ - break; \ - case CFG_NAND1_BASE: \ - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND1_CLE); \ - break; \ - } \ -} while(0) -#endif /* !CONFIG_NEW_NAND_CODE */ #ifdef NAND_NO_RB /* constant delay (see also tR in the datasheet) */ @@ -385,7 +316,7 @@ #define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0) #define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) #define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) - +#endif /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 242c837a3..21945a343 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -326,6 +326,8 @@ /************************************************************ * Disk-On-Chip configuration ************************************************************/ +#define CFG_NAND_LEGACY + #define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ #define CFG_DOC_SHORT_TIMEOUT #define CFG_DOC_SUPPORT_2000 diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h index c1c765f39..a8454d99f 100644 --- a/include/configs/SXNI855T.h +++ b/include/configs/SXNI855T.h @@ -183,6 +183,7 @@ */ /* NAND flash support */ +#define CFG_NAND_LEGACY #define CONFIG_MTD_NAND_ECC_JFFS2 #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index 3ca137e53..96f3d26cc 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -141,6 +141,8 @@ * NAND-FLASH stuff *----------------------------------------------------------------------- */ +#define CFG_NAND_LEGACY + #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index d92f81f78..faf855d24 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -133,6 +133,8 @@ * NAND-FLASH stuff *----------------------------------------------------------------------- */ +#define CFG_NAND_LEGACY + #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h index eacc74446..6d3282150 100644 --- a/include/configs/bamboo.h +++ b/include/configs/bamboo.h @@ -43,6 +43,7 @@ * 2nd ethernet port you have to "undef" the following define. */ #define CONFIG_BAMBOO_NAND 1 /* enable nand flash support */ +#define CFG_NAND_LEGACY /*----------------------------------------------------------------------- * Base addresses -- Note these are effective addresses where the diff --git a/include/configs/netstar.h b/include/configs/netstar.h index 30d265473..697796a11 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -130,8 +130,8 @@ * NAND flash */ #define CFG_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 #define CFG_NAND_BASE 0x04000000 + (2 << 23) -#define CONFIG_NEW_NAND_CODE /* * JFFS2 partitions (mtdparts command line support) diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h index 7118f3f74..92ee8cb33 100644 --- a/include/configs/svm_sc8xx.h +++ b/include/configs/svm_sc8xx.h @@ -141,6 +141,7 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#define CFG_NAND_LEGACY /* * Miscellaneous configurable options |