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-rw-r--r--arch/arm/config.mk5
-rw-r--r--arch/arm/cpu/arm1136/start.S131
-rw-r--r--arch/arm/cpu/arm1176/start.S218
-rw-r--r--arch/arm/cpu/arm720t/start.S107
-rw-r--r--arch/arm/cpu/arm920t/start.S146
-rw-r--r--arch/arm/cpu/arm925t/start.S123
-rw-r--r--arch/arm/cpu/arm926ejs/orion5x/dram.c15
-rw-r--r--arch/arm/cpu/arm926ejs/start.S100
-rw-r--r--arch/arm/cpu/arm946es/start.S87
-rw-r--r--arch/arm/cpu/arm_intcm/start.S89
-rw-r--r--arch/arm/cpu/armv7/omap3/emif4.c24
-rw-r--r--arch/arm/cpu/armv7/omap3/sdrc.c28
-rw-r--r--arch/arm/cpu/armv7/omap4/board.c5
-rw-r--r--arch/arm/cpu/armv7/start.S117
-rw-r--r--arch/arm/cpu/ixp/start.S205
-rw-r--r--arch/arm/cpu/lh7a40x/start.S115
-rw-r--r--arch/arm/cpu/pxa/start.S33
-rw-r--r--arch/arm/cpu/s3c44b0/start.S87
-rw-r--r--arch/arm/cpu/sa1100/start.S90
-rw-r--r--arch/arm/include/asm/arch-pxa/macro.h328
-rw-r--r--arch/arm/include/asm/config.h3
-rw-r--r--arch/arm/include/asm/global_data.h2
-rw-r--r--arch/arm/include/asm/u-boot-arm.h6
-rw-r--r--arch/arm/lib/board.c260
-rw-r--r--arch/arm/lib/cache-cp15.c19
-rw-r--r--arch/arm/lib/interrupts.c6
-rw-r--r--arch/avr32/include/asm/config.h2
-rw-r--r--arch/avr32/lib/board.c4
-rw-r--r--arch/blackfin/include/asm/config.h3
-rw-r--r--arch/i386/include/asm/config.h2
-rw-r--r--arch/m68k/include/asm/config.h2
-rw-r--r--arch/m68k/lib/board.c4
-rw-r--r--arch/microblaze/include/asm/config.h3
-rw-r--r--arch/mips/include/asm/config.h2
-rw-r--r--arch/mips/lib/board.c4
-rw-r--r--arch/nios2/include/asm/config.h3
-rw-r--r--arch/powerpc/include/asm/config.h3
-rw-r--r--arch/sh/include/asm/config.h3
-rw-r--r--arch/sparc/include/asm/config.h2
-rw-r--r--arch/sparc/lib/board.c4
40 files changed, 24 insertions, 2366 deletions
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 21c1e33e6..4e165bfda 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -33,9 +33,6 @@ STANDALONE_LOAD_ADDR = 0xc100000
endif
endif
-ifdef CONFIG_SYS_ARM_WITHOUT_RELOC
-PLATFORM_CPPFLAGS += -DCONFIG_SYS_ARM_WITHOUT_RELOC
-endif
PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
@@ -68,9 +65,7 @@ endif
endif
LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
-ifndef CONFIG_SYS_ARM_WITHOUT_RELOC
# needed for relocation
ifndef CONFIG_NAND_SPL
PLATFORM_LDFLAGS += -pie
endif
-endif
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index d70ca1d51..aecc943c8 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -132,14 +132,11 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
-#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/*
* the actual reset code
*/
@@ -218,7 +215,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -265,7 +261,6 @@ fixnext:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -298,9 +293,7 @@ jump_2_ram:
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
-#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
@@ -318,112 +311,6 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
-
-#ifdef CONFIG_OMAP2420H4
- /* Copy vectors to mask ROM indirect addr */
- adr r0, _start /* r0 <- current position of code */
- add r0, r0, #4 /* skip reset vector */
- mov r2, #64 /* r2 <- size to copy */
- add r2, r0, r2 /* r2 <- source end address */
- mov r1, #SRAM_OFFSET0 /* build vect addr */
- mov r3, #SRAM_OFFSET1
- add r1, r1, r3
- mov r3, #SRAM_OFFSET2
- add r1, r1, r3
-next:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- bne next /* loop until equal */
- bl cpy_clk_code /* put dpll adjust code behind vectors */
-#endif
- /* the mask ROM code should have PLL and others stable */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
-#ifndef CONFIG_PRELOADER
- beq stack_setup
-#endif /* CONFIG_PRELOADER */
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
-#ifdef CONFIG_PRELOADER
- sub sp, r0, #128 /* leave 32 words for abort-stack */
-#else
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
-#endif /* CONFIG_PRELOADER */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- adr r2, _start
- ldr r0, _bss_start_ofs /* find start of bss segment */
- add r0, r0, r2
- ldr r1, _bss_end_ofs /* stop here */
- add r1, r1, r2
- mov r2, #0x00000000 /* clear */
-
-#ifndef CONFIG_PRELOADER
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- bne clbss_l
-#endif
-
- ldr r0, _start_armboot_ofs
- adr r1, _start
- add r0, r0, r1
- ldr pc, r0
-
-_start_armboot_ofs:
-#ifdef CONFIG_NAND_SPL
- .word nand_boot - _start
-#else
-#ifdef CONFIG_ONENAND_IPL
- .word start_oneboot - _start
-#else
- .word start_armboot - _start
-#endif /* CONFIG_ONENAND_IPL */
-#endif /* CONFIG_NAND_SPL */
-
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
@@ -508,13 +395,7 @@ cpu_init_crit:
sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
-#else
- adr r2, _start
- sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#endif
ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -545,13 +426,7 @@ cpu_init_crit:
.endm
.macro get_bad_stack
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
-#else
- adr r13, _start @ setup our mode stack (enter in banked mode)
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
-#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr
@@ -567,13 +442,7 @@ cpu_init_crit:
.macro get_bad_stack_swi
sub r13, r13, #4 @ space on current stack for scratch reg.
str r0, [r13] @ save R0's value.
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r0, IRQ_STACK_START_IN @ get data regions start
-#else
- ldr r0, _armboot_start @ get data regions start
- sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
- sub r0, r0, #(GENERATED_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
-#endif
str lr, [r0] @ save caller lr in position 0 of saved stack
mrs r0, spsr @ get the spsr
str lr, [r0, #4] @ save spsr in position 1 of saved stack
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 7f32db787..f04d26888 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -108,12 +108,6 @@ _TEXT_BASE:
_TEXT_PHY_BASE:
.word CONFIG_SYS_PHY_UBOOT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
* Subtracting _start from them lets the linker put their
@@ -157,7 +151,6 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -288,7 +281,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -335,7 +327,6 @@ fixnext:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
#ifdef CONFIG_ENABLE_MMU
enable_mmu:
@@ -406,9 +397,7 @@ _nand_boot: .word nand_boot
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
-#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
@@ -419,188 +408,6 @@ _board_init_r_ofs:
.word board_init_r - _start
#endif
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0, cpsr
- bic r0, r0, #0x3f
- orr r0, r0, #0xd3
- msr cpsr, r0
-
-/*
- *************************************************************************
- *
- * CPU_init_critical registers
- *
- * setup important registers
- * setup memory timing
- *
- *************************************************************************
- */
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-cpu_init_crit:
- /*
- * When booting from NAND - it has definitely been a reset, so, no need
- * to flush caches and disable the MMU
- */
-#ifndef CONFIG_NAND_SPL
- /*
- * flush v4 I/D caches
- */
- mov r0, #0
- mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
- mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
-
- /*
- * disable MMU stuff and caches
- */
- mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
- bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
- orr r0, r0, #0x00000002 @ set bit 2 (A) Align
- orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
-
- /* Prepare to disable the MMU */
- adr r2, mmu_disable_phys
- sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
- b mmu_disable
-
- .align 5
- /* Run in a single cache-line */
-mmu_disable:
- mcr p15, 0, r0, c1, c0, 0
- nop
- nop
- mov pc, r2
-mmu_disable_phys:
-
-#ifdef CONFIG_DISABLE_TCM
- /*
- * Disable the TCMs
- */
- mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
- cmp r0, #0
- beq skip_tcmdisable
- mov r1, #0
- mov r2, #1
- tst r0, r2
- mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
- tst r0, r2, LSL #16
- mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
-skip_tcmdisable:
-#endif
-#endif
-
-#ifdef CONFIG_PERIPORT_REMAP
- /* Peri port setup */
- ldr r0, =CONFIG_PERIPORT_BASE
- orr r0, r0, #CONFIG_PERIPORT_SIZE
- mcr p15,0,r0,c15,c2,4
-#endif
-
- /*
- * Go setup Memory and board specific bits prior to relocation.
- */
- bl lowlevel_init /* go setup pll,mux,memory */
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
-#ifdef CONFIG_ENABLE_MMU
-enable_mmu:
- /* enable domain access */
- ldr r5, =0x0000ffff
- mcr p15, 0, r5, c3, c0, 0 /* load domain access register */
-
- /* Set the TTB register */
- ldr r0, _mmu_table_base
- ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE
- ldr r2, =0xfff00000
- bic r0, r0, r2
- orr r1, r0, r1
- mcr p15, 0, r1, c2, c0, 0
-
- /* Enable the MMU */
- mrc p15, 0, r0, c1, c0, 0
- orr r0, r0, #1 /* Set CR_M to enable MMU */
-
- /* Prepare to enable the MMU */
- adr r1, skip_hw_init
- and r1, r1, #0x3fc
- ldr r2, _TEXT_BASE
- ldr r3, =0xfff00000
- and r2, r2, r3
- orr r2, r2, r1
- b mmu_enable
-
- .align 5
- /* Run in a single cache-line */
-mmu_enable:
-
- mcr p15, 0, r0, c1, c0, 0
- nop
- nop
- mov pc, r2
-skip_hw_init:
-#endif
-
- /* Set up the stack */
-stack_setup:
- ldr r0, =CONFIG_SYS_UBOOT_BASE /* base of copy in DRAM */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
- mov r2, #0 /* clear */
-
-clbss_l:
- str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- blo clbss_l
-
-#ifndef CONFIG_NAND_SPL
- ldr pc, _start_armboot
-
-_start_armboot:
- .word start_armboot
-#else
- b nand_boot
-/* .word nand_boot*/
-#endif
-
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
#ifdef CONFIG_ENABLE_MMU
_mmu_table_base:
.word mmu_table
@@ -687,14 +494,7 @@ phy_last_jump:
/* Save user registers (now in svc mode) r0-r12 */
stmia sp, {r0 - r12}
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
- /* set base 2 words into abort stack */
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8)
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
/* get values for "aborted" pc and cpsr (into parm regs) */
ldmia r2, {r2 - r3}
/* grab pointer to old stack */
@@ -709,16 +509,7 @@ phy_last_jump:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- /* setup our mode stack (enter in banked mode) */
- ldr r13, _armboot_start
- /* move past malloc pool */
- sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
- /* move to reserved a couple spots for abort stack */
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8)
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
/* save caller lr in position 0 of saved stack */
str lr, [r13]
@@ -743,16 +534,7 @@ phy_last_jump:
sub r13, r13, #4
/* save R0's value. */
str r0, [r13]
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- /* get data regions start */
- ldr r0, _armboot_start
- /* move past malloc pool */
- sub r0, r0, #(CONFIG_SYS_MALLOC_LEN)
- /* move past gbl and a couple spots for abort stack */
- sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8)
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
/* save caller lr in position 0 of saved stack */
str lr, [r0]
/* get the spsr */
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 41c1519ef..8cd267b35 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -79,12 +79,6 @@ _fiq: .word fiq
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -108,7 +102,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -197,7 +190,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -224,7 +216,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -264,92 +255,6 @@ clbss_l:str r2, [r0] /* clear loop... */
_board_init_r: .word board_init_r
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0x13
- msr cpsr,r0
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-#ifdef CONFIG_LPC2292
- bl lowlevel_init
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
-#if CONFIG_SYS_TEXT_BASE
-#ifndef CONFIG_LPC2292 /* already done in lowlevel_init */
- ldr r2, =0x0 /* Relocate the exception vectors */
- cmp r1, r2 /* and associated data to address */
- ldmneia r0!, {r3-r10} /* 0x0. Do nothing if CONFIG_SYS_TEXT_BASE is */
- stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */
- ldmneia r0, {r3-r9}
- stmneia r2, {r3-r9}
- adrne r0, _start /* restore r0 */
-#endif /* !CONFIG_LPC2292 */
-#endif
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- blo clbss_l
-
- ldr pc, _start_armboot
-
-_start_armboot: .word start_armboot
-
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
@@ -606,13 +511,7 @@ lock_loop:
stmia sp, {r0 - r12} @ Calling r0-r12
add r8, sp, #S_PC
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@@ -643,13 +542,7 @@ lock_loop:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index f0274b1f8..d4edde797 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -75,12 +75,6 @@ _fiq: .word fiq
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -104,7 +98,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -243,7 +236,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -270,7 +262,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -316,127 +307,6 @@ _nand_boot: .word nand_boot
_board_init_r: .word board_init_r
#endif
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual start code
- */
-
-start_code:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0, cpsr
- bic r0, r0, #0x1f
- orr r0, r0, #0xd3
- msr cpsr, r0
-
- bl coloured_LED_init
- bl red_LED_on
-
-#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
- /*
- * relocate exception table
- */
- ldr r0, =_start
- ldr r1, =0x0
- mov r2, #16
-copyex:
- subs r2, r2, #1
- ldr r3, [r0], #4
- str r3, [r1], #4
- bne copyex
-#endif
-
-#ifdef CONFIG_S3C24X0
- /* turn off the watchdog */
-
-# if defined(CONFIG_S3C2400)
-# define pWTCON 0x15300000
-# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
-# define CLKDIVN 0x14800014 /* clock divisor register */
-#else
-# define pWTCON 0x53000000
-# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
-# define INTSUBMSK 0x4A00001C
-# define CLKDIVN 0x4C000014 /* clock divisor register */
-# endif
-
- ldr r0, =pWTCON
- mov r1, #0x0
- str r1, [r0]
-
- /*
- * mask all IRQs by setting all bits in the INTMR - default
- */
- mov r1, #0xffffffff
- ldr r0, =INTMSK
- str r1, [r0]
-# if defined(CONFIG_S3C2410)
- ldr r1, =0x3ff
- ldr r0, =INTSUBMSK
- str r1, [r0]
-# endif
-
- /* FCLK:HCLK:PCLK = 1:2:4 */
- /* default FCLK is 120 MHz ! */
- ldr r0, =CLKDIVN
- mov r1, #3
- str r1, [r0]
-#endif /* CONFIG_S3C24X0 */
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- blo clbss_l
-
- ldr pc, _start_armboot
-
-_start_armboot: .word start_armboot
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
@@ -525,15 +395,7 @@ cpu_init_crit:
.macro bad_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE)
- sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
- /* set base 2 words into abort stack */
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8)
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
ldmia r2, {r2 - r3} @ get pc, cpsr
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@@ -565,15 +427,7 @@ cpu_init_crit:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE)
- sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
- /* reserve a couple spots in abort stack */
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8)
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index 2ad2df847..51229c615 100644
--- a/arch/arm/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
@@ -85,12 +85,6 @@ _fiq: .word fiq
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -114,7 +108,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -234,7 +227,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -261,7 +253,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -305,108 +296,6 @@ _nand_boot: .word nand_boot
_board_init_r: .word board_init_r
#endif
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
-
- /*
- * Set up 925T mode
- */
- mov r1, #0x81 /* Set ARM925T configuration. */
- mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
-
- /*
- * turn off the watchdog, unlock/diable sequence
- */
- mov r1, #0xF5
- ldr r0, =WDTIM_MODE
- strh r1, [r0]
- mov r1, #0xA0
- strh r1, [r0]
-
- /*
- * mask all IRQs by setting all bits in the INTMR - default
- */
- mov r1, #0xffffffff
- ldr r0, =REG_IHL1_MIR
- str r1, [r0]
- ldr r0, =REG_IHL2_MIR
- str r1, [r0]
-
- /*
- * wait for dpll to lock
- */
- ldr r0, =CK_DPLL1
- mov r1, #0x10
- strh r1, [r0]
-poll1:
- ldrh r1, [r0]
- ands r1, r1, #0x01
- beq poll1
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- blo clbss_l
-
- ldr pc, _start_armboot
-
-_start_armboot: .word start_armboot
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
@@ -489,13 +378,7 @@ cpu_init_crit:
sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -526,13 +409,7 @@ cpu_init_crit:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN
-#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c
index c5c8ab7e4..b74928209 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/dram.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c
@@ -49,20 +49,6 @@ u32 orion5x_sdram_bar(enum memory_bank bank)
result = winregs[bank].base;
return result;
}
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-int dram_init(void)
-{
- int i;
-
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
- gd->bd->bi_dram[i].start = orion5x_sdram_bar(i);
- gd->bd->bi_dram[i].size = get_ram_size(
- (volatile long *) (gd->bd->bi_dram[i].start),
- CONFIG_MAX_RAM_BANK_SIZE);
- }
- return 0;
-}
-#else
int dram_init (void)
{
/* dram_init must store complete ramsize in gd->ram_size */
@@ -83,4 +69,3 @@ void dram_init_banksize (void)
CONFIG_MAX_RAM_BANK_SIZE);
}
}
-#endif
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 7397882b5..6dcc9b4d6 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -145,7 +145,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -205,7 +204,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -252,7 +250,6 @@ fixnext:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -287,9 +284,7 @@ _nand_boot_ofs:
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
-#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
@@ -307,89 +302,6 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
- ldr r3, _bss_start_ofs /* r3 <- _bss_start - _start */
- add r2, r0, r3 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub sp, r0, #128 /* leave 32 words for abort-stack */
-#ifndef CONFIG_PRELOADER
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
-#endif /* CONFIG_PRELOADER */
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- adr r2, _start
- ldr r0, _bss_start_ofs /* find start of bss segment */
- add r0, r0, r2
- ldr r1, _bss_end_ofs /* stop here */
- add r1, r1, r2
- mov r2, #0x00000000 /* clear */
-
-#ifndef CONFIG_PRELOADER
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- blo clbss_l
-
- bl coloured_LED_init
- bl red_LED_on
-#endif /* CONFIG_PRELOADER */
-
- ldr r0, _start_armboot_ofs
- adr r1, _start
- add r0, r0, r1
- ldr pc, r0
-
-_start_armboot_ofs:
-#ifdef CONFIG_NAND_SPL
- .word nand_boot - _start
-#else
- .word start_armboot - _start
-#endif /* CONFIG_NAND_SPL */
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
@@ -474,13 +386,7 @@ cpu_init_crit:
@ carve out a frame on current user stack
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- adr r2, _start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
@ get values for "aborted" pc and cpsr (into parm regs)
ldmia r2, {r2 - r3}
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -512,13 +418,7 @@ cpu_init_crit:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- adr r13, _start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 22af2fae9..cad43ba04 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -89,12 +89,6 @@ _fiq:
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -118,7 +112,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -203,7 +196,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -230,7 +222,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -273,72 +264,6 @@ _nand_boot: .word nand_boot
_board_init_r: .word board_init_r
#endif
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- bne clbss_l
-
- ldr pc, _start_armboot
-
-_start_armboot:
- .word start_armboot
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
@@ -424,13 +349,7 @@ cpu_init_crit:
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
@ get values for "aborted" pc and cpsr (into parm regs)
ldmia r2, {r2 - r3}
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -462,13 +381,7 @@ cpu_init_crit:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index a420f44ff..957ca3476 100644
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -87,12 +87,6 @@ _fiq:
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -116,7 +110,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -201,7 +194,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -228,7 +220,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -268,74 +259,6 @@ clbss_l:str r2, [r0] /* clear loop... */
_board_init_r: .word board_init_r
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
-/*
- * the actual reset code
- */
-.globl reset
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* pc relative address of label */
- ldr r1, _TEXT_BASE /* linked image address of label */
- cmp r0, r1 /* test if we run from flash or RAM */
- beq stack_setup /* ifeq we are in the RAM copy */
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- blo clbss_l
-
- ldr pc, _start_armboot
-
-_start_armboot:
- .word start_armboot
-
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
@@ -400,13 +323,7 @@ cpu_init_crit:
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
@ get values for "aborted" pc and cpsr (into parm regs)
ldmia r2, {r2 - r3}
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -438,13 +355,7 @@ cpu_init_crit:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr
diff --git a/arch/arm/cpu/armv7/omap3/emif4.c b/arch/arm/cpu/armv7/omap3/emif4.c
index da2cd9001..0870857ed 100644
--- a/arch/arm/cpu/armv7/omap3/emif4.c
+++ b/arch/arm/cpu/armv7/omap3/emif4.c
@@ -136,29 +136,6 @@ void do_emif4_init(void)
* dram_init -
* - Sets uboots idea of sdram size
*/
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-int dram_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int size0 = 0, size1 = 0;
-
- size0 = get_sdr_cs_size(CS0);
- /*
- * If a second bank of DDR is attached to CS1 this is
- * where it can be started. Early init code will init
- * memory on CS0.
- */
- if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED))
- size1 = get_sdr_cs_size(CS1);
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = size0;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
- gd->bd->bi_dram[1].size = size1;
-
- return 0;
-}
-#else
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
@@ -190,7 +167,6 @@ void dram_init_banksize (void)
gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
gd->bd->bi_dram[1].size = size1;
}
-#endif
/*
* mem_init() -
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 6c419f5b9..c75aa1d11 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -163,33 +163,6 @@ void do_sdrc_init(u32 cs, u32 early)
* dram_init -
* - Sets uboots idea of sdram size
*/
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-int dram_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int size0 = 0, size1 = 0;
-
- size0 = get_sdr_cs_size(CS0);
- /*
- * If a second bank of DDR is attached to CS1 this is
- * where it can be started. Early init code will init
- * memory on CS0.
- */
- if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) {
- do_sdrc_init(CS1, NOT_EARLY);
- make_cs1_contiguous();
-
- size1 = get_sdr_cs_size(CS1);
- }
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = size0;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
- gd->bd->bi_dram[1].size = size1;
-
- return 0;
-}
-#else
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
@@ -225,7 +198,6 @@ void dram_init_banksize (void)
gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
gd->bd->bi_dram[1].size = size1;
}
-#endif
/*
* mem_init -
diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c
index 24a66f5b9..e7651d2dd 100644
--- a/arch/arm/cpu/armv7/omap4/board.c
+++ b/arch/arm/cpu/armv7/omap4/board.c
@@ -102,12 +102,7 @@ int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- gd->bd->bi_dram[0].start = 0x80000000;
- gd->bd->bi_dram[0].size = sdram_size();
-#else
gd->ram_size = sdram_size();
-#endif
return 0;
}
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index bdf2fad38..bb3948d40 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -70,12 +70,6 @@ _end_vect:
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -99,7 +93,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -196,7 +189,6 @@ relocate_code:
stack_setup:
mov sp, r4
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs
@@ -266,7 +258,6 @@ clbss_l:str r2, [r0] /* clear loop... */
cmp r0, r1
bne clbss_l
#endif /* #ifndef CONFIG_PRELOADER */
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
/*
* We are done. Do not return, instead branch to second part of board
@@ -276,9 +267,7 @@ jump_2_ram:
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
-#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
@@ -295,94 +284,6 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0, cpsr
- bic r0, r0, #0x1f
- orr r0, r0, #0xd3
- msr cpsr,r0
-
-#if (CONFIG_OMAP34XX)
- /* Copy vectors to mask ROM indirect addr */
- adr r0, _start @ r0 <- current position of code
- add r0, r0, #4 @ skip reset vector
- mov r2, #64 @ r2 <- size to copy
- add r2, r0, r2 @ r2 <- source end address
- mov r1, #SRAM_OFFSET0 @ build vect addr
- mov r3, #SRAM_OFFSET1
- add r1, r1, r3
- mov r3, #SRAM_OFFSET2
- add r1, r1, r3
-next:
- ldmia r0!, {r3 - r10} @ copy from source address [r0]
- stmia r1!, {r3 - r10} @ copy to target address [r1]
- cmp r0, r2 @ until source end address [r2]
- bne next @ loop until equal */
-#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT)
- /* No need to copy/exec the clock code - DPLL adjust already done
- * in NAND/oneNAND Boot.
- */
- bl cpy_clk_code @ put dpll adjust code behind vectors
-#endif /* NAND Boot */
-#endif
- /* the mask ROM code should have PLL and others stable */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: @ relocate U-Boot to RAM
- adr r0, _start @ r0 <- current position of code
- ldr r1, _TEXT_BASE @ test if we run from flash or RAM
- cmp r0, r1 @ don't reloc during debug
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 @ r2 <- size of armboot
- add r2, r0, r2 @ r2 <- source end address
-
-copy_loop: @ copy 32 bytes at a time
- ldmia r0!, {r3 - r10} @ copy from source address [r0]
- stmia r1!, {r3 - r10} @ copy to target address [r1]
- cmp r0, r2 @ until source end address [r2]
- blo copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE @ upper 128 KiB: relocated uboot
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN @ malloc area
- sub r0, r0, #GENERATED_GBL_DATA_SIZE @ bdinfo
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 @ leave 3 words for abort-stack
- bic sp, sp, #7 @ 8-byte alignment for ABI compliance
-
- /* Clear BSS (if any). Is below tx (watch load addr - need space) */
-clear_bss:
- ldr r0, _bss_start @ find start of bss segment
- ldr r1, _bss_end @ stop here
- mov r2, #0x00000000 @ clear value
-clbss_l:
- str r2, [r0] @ clear BSS location
- cmp r0, r1 @ are we at the end yet
- add r0, r0, #4 @ increment clear index pointer
- bne clbss_l @ keep clearing till at end
-
- ldr pc, _start_armboot @ jump to C code
-
-_start_armboot: .word start_armboot
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*************************************************************************
*
* CPU_init_critical registers
@@ -464,14 +365,8 @@ cpu_init_crit:
@ user stack
stmia sp, {r0 - r12} @ Save user registers (now in
@ svc mode) r0-r12
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE + 8) @ set base 2 words into abort
-#else
ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort
@ stack
-#endif
ldmia r2, {r2 - r3} @ get values for "aborted" pc
@ and cpsr (into parm regs)
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -507,14 +402,8 @@ cpu_init_crit:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack (enter
- sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8) @ move to reserved a couple
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter
@ in banked mode)
-#endif
str lr, [r13] @ save caller lr in position 0
@ of saved stack
@@ -535,14 +424,8 @@ cpu_init_crit:
sub r13, r13, #4 @ space on current stack for
@ scratch reg.
str r0, [r13] @ save R0's value.
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r0, _armboot_start @ get data regions start
- sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
- sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8) @ move past gbl and a couple
-#else
ldr r0, IRQ_STACK_START_IN @ get data regions start
@ spots for abort stack
-#endif
str lr, [r0] @ save caller lr in position 0
@ of saved stack
mrs r0, spsr @ get the spsr
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index a2560d4c2..8d1aebc71 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -98,12 +98,6 @@ _fiq: .word fiq
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -127,7 +121,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -327,7 +320,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -354,7 +346,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -394,190 +385,6 @@ clbss_l:str r2, [r0] /* clear loop... */
_board_init_r: .word board_init_r
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/****************************************************************************/
-/* */
-/* the actual reset code */
-/* */
-/****************************************************************************/
-
-reset:
- /* disable mmu, set big-endian */
- mov r0, #0xf8
- mcr p15, 0, r0, c1, c0, 0
- CPWAIT r0
-
- /* invalidate I & D caches & BTB */
- mcr p15, 0, r0, c7, c7, 0
- CPWAIT r0
-
- /* invalidate I & Data TLB */
- mcr p15, 0, r0, c8, c7, 0
- CPWAIT r0
-
- /* drain write and fill buffers */
- mcr p15, 0, r0, c7, c10, 4
- CPWAIT r0
-
- /* disable write buffer coalescing */
- mrc p15, 0, r0, c1, c0, 1
- orr r0, r0, #1
- mcr p15, 0, r0, c1, c0, 1
- CPWAIT r0
-
- /* set EXP CS0 to the optimum timing */
- ldr r1, =CONFIG_SYS_EXP_CS0
- ldr r2, =IXP425_EXP_CS0
- str r1, [r2]
-
- /* make sure flash is visible at 0 */
-#if 0
- ldr r2, =IXP425_EXP_CFG0
- ldr r1, [r2]
- orr r1, r1, #0x80000000
- str r1, [r2]
-#endif
- mov r1, #CONFIG_SYS_SDR_CONFIG
- ldr r2, =IXP425_SDR_CONFIG
- str r1, [r2]
-
- /* disable refresh cycles */
- mov r1, #0
- ldr r3, =IXP425_SDR_REFRESH
- str r1, [r3]
-
- /* send nop command */
- mov r1, #3
- ldr r4, =IXP425_SDR_IR
- str r1, [r4]
- DELAY_FOR 0x4000, r0
-
- /* set SDRAM internal refresh val */
- ldr r1, =CONFIG_SYS_SDRAM_REFRESH_CNT
- str r1, [r3]
- DELAY_FOR 0x4000, r0
-
- /* send precharge-all command to close all open banks */
- mov r1, #2
- str r1, [r4]
- DELAY_FOR 0x4000, r0
-
- /* provide 8 auto-refresh cycles */
- mov r1, #4
- mov r5, #8
-111: str r1, [r4]
- DELAY_FOR 0x100, r0
- subs r5, r5, #1
- bne 111b
-
- /* set mode register in sdram */
- mov r1, #CONFIG_SYS_SDR_MODE_CONFIG
- str r1, [r4]
- DELAY_FOR 0x4000, r0
-
- /* send normal operation command */
- mov r1, #6
- str r1, [r4]
- DELAY_FOR 0x4000, r0
-
- /* copy */
- mov r0, #0
- mov r4, r0
- add r2, r0, #CONFIG_SYS_MONITOR_LEN
- mov r1, #0x10000000
- mov r5, r1
-
- 30:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r0, r2
- bne 30b
-
- /* invalidate I & D caches & BTB */
- mcr p15, 0, r0, c7, c7, 0
- CPWAIT r0
-
- /* invalidate I & Data TLB */
- mcr p15, 0, r0, c8, c7, 0
- CPWAIT r0
-
- /* drain write and fill buffers */
- mcr p15, 0, r0, c7, c10, 4
- CPWAIT r0
-
- /* move flash to 0x50000000 */
- ldr r2, =IXP425_EXP_CFG0
- ldr r1, [r2]
- bic r1, r1, #0x80000000
- str r1, [r2]
-
- nop
- nop
- nop
- nop
- nop
- nop
-
- /* invalidate I & Data TLB */
- mcr p15, 0, r0, c8, c7, 0
- CPWAIT r0
-
- /* enable I cache */
- mrc p15, 0, r0, c1, c0, 0
- orr r0, r0, #MMU_Control_I
- mcr p15, 0, r0, c1, c0, 0
- CPWAIT r0
-
- mrs r0,cpsr /* set the cpu to SVC32 mode */
- bic r0,r0,#0x1f /* (superviser mode, M=10011) */
- orr r0,r0,#0x13
- msr cpsr,r0
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- blo clbss_l
-
- ldr pc, _start_armboot
-
-_start_armboot: .word start_armboot
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/****************************************************************************/
/* */
@@ -618,13 +425,7 @@ _start_armboot: .word start_armboot
stmia sp, {r0 - r12} /* Calling r0-r12 */
add r8, sp, #S_PC
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */
add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */
@@ -659,13 +460,7 @@ _start_armboot: .word start_armboot
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S
index 239ad47a4..fd8a40b8a 100644
--- a/arch/arm/cpu/lh7a40x/start.S
+++ b/arch/arm/cpu/lh7a40x/start.S
@@ -75,12 +75,6 @@ _fiq: .word fiq
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -104,7 +98,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -214,7 +207,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -241,7 +233,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -278,100 +269,6 @@ clbss_l:str r2, [r0] /* clear loop... */
_board_init_r: .word board_init_r
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
-
-#define pWDTCTL 0x80001400 /* Watchdog Timer control register */
-#define pINTENC 0x8000050C /* Interupt-Controller enable clear register */
-#define pCLKSET 0x80000420 /* clock divisor register */
-
- /* disable watchdog, set watchdog control register to
- * all zeros (default reset)
- */
- ldr r0, =pWDTCTL
- mov r1, #0x0
- str r1, [r0]
-
- /*
- * mask all IRQs by setting all bits in the INTENC register (default)
- */
- mov r1, #0xffffffff
- ldr r0, =pINTENC
- str r1, [r0]
-
- /* FCLK:HCLK:PCLK = 1:2:2 */
- /* default FCLK is 200 MHz, using 14.7456 MHz fin */
- ldr r0, =pCLKSET
- ldr r1, =0x0004ee39
-@ ldr r1, =0x0005ee39 @ 1: 2: 4
- str r1, [r0]
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- @add r0, r0, #4 /* start at first byte of bss */
- /* why inc. 4 bytes past then? */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- blo clbss_l
-
- ldr pc, _start_armboot
-
-_start_armboot: .word start_armboot
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
@@ -460,13 +357,7 @@ cpu_init_crit:
.macro bad_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
ldmia r2, {r2 - r3} @ get pc, cpsr
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@@ -497,13 +388,7 @@ cpu_init_crit:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index bf8510eb7..ae358a56e 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -33,7 +33,6 @@
#include <config.h>
#include <version.h>
#include <asm/arch/pxa-regs.h>
-#include <asm/arch/macro.h>
/* takes care the CP15 update has taken place */
.macro CPWAIT reg
@@ -251,7 +250,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
stmfd sp!, {r0-r12}
copy_loop:
ldmia r0!, {r3-r5, r7-r11} /* copy from source address [r0] */
@@ -299,8 +297,7 @@ fixnext:
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
blo fixloop
-#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
+#endif /* #ifndef CONFIG_PRELOADER */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -316,7 +313,7 @@ clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
-#endif
+#endif /* #ifndef CONFIG_PRELOADER */
/*
* We are done. Do not return, instead branch to second part of board
@@ -332,9 +329,7 @@ _start_oneboot_ofs
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
-#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
@@ -343,7 +338,7 @@ _start_oneboot_ofs
_board_init_r_ofs:
.word board_init_r - _start
-#endif
+#endif /* CONFIG_ONENAND_IPL */
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
@@ -352,7 +347,7 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
+#else /* CONFIG_PRELOADER */
/****************************************************************************/
/* */
@@ -377,7 +372,7 @@ reset:
/* Start OneNAND IPL */
ldr pc, =start_oneboot
-#endif /* #if !defined(CONFIG_ONENAND_IPL) */
+#endif /* CONFIG_PRELOADER */
#ifndef CONFIG_PRELOADER
/****************************************************************************/
@@ -419,13 +414,7 @@ reset:
stmia sp, {r0 - r12} /* Calling r0-r12 */
add r8, sp, #S_PC
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */
add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */
@@ -460,13 +449,7 @@ reset:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
@@ -485,7 +468,7 @@ reset:
.macro get_fiq_stack @ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
-#endif /* CONFIG_PRELOADER */
+#endif /* CONFIG_PRELOADER
/****************************************************************************/
@@ -499,7 +482,7 @@ reset:
do_hang:
ldr sp, _TEXT_BASE /* use 32 words abort stack */
bl hang /* hang and never return */
-#else /* !CONFIG_PRELOADER */
+#else
.align 5
undefined_instruction:
get_bad_stack
@@ -618,4 +601,4 @@ mmu_table:
.word (__base << 20) | 0xc12
.set __base, __base + 1
.endr
-#endif
+#endif /* CONFIG_PRELOADER */
diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
index c58da9879..67b2c6a69 100644
--- a/arch/arm/cpu/s3c44b0/start.S
+++ b/arch/arm/cpu/s3c44b0/start.S
@@ -66,12 +66,6 @@ _start: b reset
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -95,7 +89,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -186,7 +179,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -225,7 +217,6 @@ vector_copy_loop:
stmia r1!, {r3-r10}
cmp r0, r2
blo vector_copy_loop
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -265,84 +256,6 @@ clbss_l:str r2, [r0] /* clear loop... */
_board_init_r: .word board_init_r
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0x13
- msr cpsr,r0
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
- /*
- * before relocating, we have to setup RAM timing
- * because memory timing is board-dependend, you will
- * find a lowlevel_init.S in your board directory.
- */
- bl lowlevel_init
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-
-/*
- now copy to sram the interrupt vector
-*/
- adr r0, real_vectors
- add r2, r0, #1024
- ldr r1, =0x0c000000
- add r1, r1, #0x08
-vector_copy_loop:
- ldmia r0!, {r3-r10}
- stmia r1!, {r3-r10}
- cmp r0, r2
- blo vector_copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
- ldr pc, _start_armboot
-
-_start_armboot: .word start_armboot
-
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index e6afe0f86..ace0c074d 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -76,12 +76,6 @@ _fiq: .word fiq
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
@@ -105,7 +99,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@@ -190,7 +183,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@@ -217,7 +209,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@@ -254,75 +245,6 @@ clbss_l:str r2, [r0] /* clear loop... */
_board_init_r: .word board_init_r
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0x13
- msr cpsr,r0
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- blo copy_loop
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- blo clbss_l
-
- ldr pc, _start_armboot
-
-_start_armboot: .word start_armboot
-
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
/*
*************************************************************************
*
@@ -441,13 +363,7 @@ cpu_init_crit:
stmia sp, {r0 - r12} @ Calling r0-r12
add r8, sp, #S_PC
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@@ -478,13 +394,7 @@ cpu_init_crit:
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
diff --git a/arch/arm/include/asm/arch-pxa/macro.h b/arch/arm/include/asm/arch-pxa/macro.h
deleted file mode 100644
index 85958dd32..000000000
--- a/arch/arm/include/asm/arch-pxa/macro.h
+++ /dev/null
@@ -1,328 +0,0 @@
-/*
- * arch/arm/include/asm/arch-pxa/macro.h
- *
- * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASM_ARCH_PXA_MACRO_H__
-#define __ASM_ARCH_PXA_MACRO_H__
-#ifdef __ASSEMBLY__
-
-#include <asm/macro.h>
-#include <asm/arch/pxa-regs.h>
-
-/*
- * This macro performs a 32bit write to a memory location and makes sure the
- * write operation really happened by performing a read back.
- *
- * Clobbered regs: r4, r5
- */
-.macro write32rb addr, data
- ldr r4, =\addr
- ldr r5, =\data
- str r5, [r4]
- ldr r5, [r4]
-.endm
-
-/*
- * This macro waits according to OSCR incrementation
- *
- * Clobbered regs: r4, r5, r6
- */
-.macro pxa_wait_ticks ticks
- ldr r4, =OSCR
- mov r5, #0
- str r5, [r4]
- ldr r5, =\ticks
-1:
- ldr r6, [r4]
- cmp r5, r6
- bgt 1b
-.endm
-
-/*
- * This macro sets up the GPIO pins of the PXA2xx/PXA3xx CPU
- *
- * Clobbered regs: r4, r5
- */
-.macro pxa_gpio_setup
- write32 GPSR0, CONFIG_SYS_GPSR0_VAL
- write32 GPSR1, CONFIG_SYS_GPSR1_VAL
- write32 GPSR2, CONFIG_SYS_GPSR2_VAL
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
- write32 GPSR3, CONFIG_SYS_GPSR3_VAL
-#endif
-
- write32 GPCR0, CONFIG_SYS_GPCR0_VAL
- write32 GPCR1, CONFIG_SYS_GPCR1_VAL
- write32 GPCR2, CONFIG_SYS_GPCR2_VAL
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
- write32 GPCR3, CONFIG_SYS_GPCR3_VAL
-#endif
-
- write32 GPDR0, CONFIG_SYS_GPDR0_VAL
- write32 GPDR1, CONFIG_SYS_GPDR1_VAL
- write32 GPDR2, CONFIG_SYS_GPDR2_VAL
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
- write32 GPDR3, CONFIG_SYS_GPDR3_VAL
-#endif
-
- write32 GAFR0_L, CONFIG_SYS_GAFR0_L_VAL
- write32 GAFR0_U, CONFIG_SYS_GAFR0_U_VAL
- write32 GAFR1_L, CONFIG_SYS_GAFR1_L_VAL
- write32 GAFR1_U, CONFIG_SYS_GAFR1_U_VAL
- write32 GAFR2_L, CONFIG_SYS_GAFR2_L_VAL
- write32 GAFR2_U, CONFIG_SYS_GAFR2_U_VAL
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
- write32 GAFR3_L, CONFIG_SYS_GAFR3_L_VAL
- write32 GAFR3_U, CONFIG_SYS_GAFR3_U_VAL
-#endif
-
- write32 PSSR, CONFIG_SYS_PSSR_VAL
-.endm
-
-/*
- * This macro sets up the Memory controller of the PXA2xx CPU
- *
- * WARNING: This macro uses internally r3 and r7 regs for MEMC_BASE
- * and CONFIG_SYS_MDREFR_VAL correspondingly. Please do not
- * use this regs for other purpose inside this macro.
- *
- * Clobbered regs: r3, r4, r5, r6, r7
- */
-.macro pxa_mem_setup
- /* This comes handy when setting MDREFR */
- ldr r3, =MEMC_BASE
-
- /*
- * 1) Initialize Asynchronous static memory controller
- */
-
- /* MSC0: nCS(0,1) */
- write32rb (MEMC_BASE + MSC0_OFFSET), CONFIG_SYS_MSC0_VAL
- /* MSC1: nCS(2,3) */
- write32rb (MEMC_BASE + MSC1_OFFSET), CONFIG_SYS_MSC1_VAL
- /* MSC2: nCS(4,5) */
- write32rb (MEMC_BASE + MSC2_OFFSET), CONFIG_SYS_MSC2_VAL
-
- /*
- * 2) Initialize Card Interface
- */
-
- /* MECR: Memory Expansion Card Register */
- write32rb (MEMC_BASE + MECR_OFFSET), CONFIG_SYS_MECR_VAL
- /* MCMEM0: Card Interface slot 0 timing */
- write32rb (MEMC_BASE + MCMEM0_OFFSET), CONFIG_SYS_MCMEM0_VAL
- /* MCMEM1: Card Interface slot 1 timing */
- write32rb (MEMC_BASE + MCMEM1_OFFSET), CONFIG_SYS_MCMEM1_VAL
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- write32rb (MEMC_BASE + MCATT0_OFFSET), CONFIG_SYS_MCATT0_VAL
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- write32rb (MEMC_BASE + MCATT1_OFFSET), CONFIG_SYS_MCATT1_VAL
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- write32rb (MEMC_BASE + MCIO0_OFFSET), CONFIG_SYS_MCIO0_VAL
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- write32rb (MEMC_BASE + MCIO1_OFFSET), CONFIG_SYS_MCIO1_VAL
-
- /*
- * 3) Configure Fly-By DMA register
- */
-
- write32rb (MEMC_BASE + FLYCNFG_OFFSET), CONFIG_SYS_FLYCNFG_VAL
-
- /*
- * 4) Initialize Timing for Sync Memory (SDCLK0)
- */
-
- /*
- * Before accessing MDREFR we need a valid DRI field, so we set
- * this to power on defaults + DRI field.
- */
- ldr r5, [r3, #MDREFR_OFFSET]
- bic r5, r5, #0x0ff
- bic r5, r5, #0xf00 /* MDREFR user config with zeroed DRI */
-
- ldr r4, =CONFIG_SYS_MDREFR_VAL
- mov r7, r4
- lsl r4, #20
- lsr r4, #20 /* Get a valid DRI field */
-
- orr r5, r5, r4 /* MDREFR user config with correct DRI */
-
- orr r5, #MDREFR_K0RUN
- orr r5, #MDREFR_SLFRSH
- bic r5, #MDREFR_APD
- bic r5, #MDREFR_E1PIN
-
- str r5, [r3, #MDREFR_OFFSET]
- ldr r4, [r3, #MDREFR_OFFSET]
-
- /*
- * 5) Initialize Synchronous Static Memory (Flash/Peripherals)
- */
-
- /* Initialize SXCNFG register. Assert the enable bits.
- *
- * Write SXMRS to cause an MRS command to all enabled banks of
- * synchronous static memory. Note that SXLCR need not be written
- * at this time.
- */
- write32rb (MEMC_BASE + SXCNFG_OFFSET), CONFIG_SYS_SXCNFG_VAL
-
- /*
- * 6) Initialize SDRAM
- */
-
- bic r7, #MDREFR_SLFRSH
- str r7, [r3, #MDREFR_OFFSET]
- ldr r4, [r3, #MDREFR_OFFSET]
-
- orr r7, #MDREFR_E1PIN
- str r7, [r3, #MDREFR_OFFSET]
- ldr r4, [r3, #MDREFR_OFFSET]
-
- /*
- * 7) Write MDCNFG with MDCNFG:DEx deasserted (set to 0), to configure
- * but not enable each SDRAM partition pair.
- */
-
- /* Fetch platform value of MDCNFG */
- ldr r4, =CONFIG_SYS_MDCNFG_VAL
- /* Disable all sdram banks */
- bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
- bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3)
- /* Write initial value of MDCNFG, w/o enabling sdram banks */
- str r4, [r3, #MDCNFG_OFFSET]
- ldr r4, [r3, #MDCNFG_OFFSET]
-
- /* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */
- pxa_wait_ticks 0x300
-
- /*
- * 8) Trigger a number (usually 8) refresh cycles by attempting
- * non-burst read or write accesses to disabled SDRAM, as commonly
- * specified in the power up sequence documented in SDRAM data
- * sheets. The address(es) used for this purpose must not be
- * cacheable.
- */
-
- ldr r4, =CONFIG_SYS_DRAM_BASE
-.rept 9
- str r5, [r4]
-.endr
-
- /*
- * 9) Write MDCNFG with enable bits asserted (MDCNFG:DEx set to 1).
- */
-
- ldr r5, =CONFIG_SYS_MDCNFG_VAL
- ldr r4, =(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3)
- and r5, r5, r4
- ldr r4, [r3, #MDCNFG_OFFSET]
- orr r4, r4, r5
- str r4, [r3, #MDCNFG_OFFSET]
- ldr r4, [r3, #MDCNFG_OFFSET]
-
- /*
- * 10) Write MDMRS.
- */
-
- ldr r4, =CONFIG_SYS_MDMRS_VAL
- str r4, [r3, #MDMRS_OFFSET]
- ldr r4, [r3, #MDMRS_OFFSET]
-
- /*
- * 11) Enable APD
- */
-
- ldr r4, [r3, #MDREFR_OFFSET]
- and r7, r7, #MDREFR_APD
- orr r4, r4, r7
- str r4, [r3, #MDREFR_OFFSET]
- ldr r4, [r3, #MDREFR_OFFSET]
-.endm
-
-/*
- * This macro tests if the CPU woke up from sleep and eventually resumes
- *
- * Clobbered regs: r4, r5
- */
-.macro pxa_wakeup
- ldr r4, =RCSR
- ldr r5, [r4]
- and r5, r5, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR)
- str r5, [r4]
- teq r5, #RCSR_SMR
-
- bne pxa_wakeup_exit
-
- ldr r4, =PSSR
- mov r5, #PSSR_PH
- str r5, [r4]
-
- ldr r4, =PSPR
- ldr pc, [r4]
-pxa_wakeup_exit:
-.endm
-
-/*
- * This macro disables all interupts on PXA2xx/PXA3xx CPU
- *
- * Clobbered regs: r4, r5
- */
-.macro pxa_intr_setup
- write32 ICLR, 0
- write32 ICMR, 0
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
- write32 ICLR2, 0
- write32 ICMR2, 0
-#endif
-.endm
-
-/*
- * This macro configures clock on PXA2xx/PXA3xx CPU
- *
- * Clobbered regs: r4, r5
- */
-.macro pxa_clock_setup
- /* Disable the peripheral clocks, and set the core clock frequency */
-
- /* Turn Off ALL on-chip peripheral clocks for re-configuration */
- write32 CKEN, CONFIG_SYS_CKEN
-
- /* Write CCCR */
- write32 CCCR, CONFIG_SYS_CCCR
-
-#ifdef CONFIG_RTC
- /* enable the 32Khz oscillator for RTC and PowerManager */
- write32 OSCC, #OSCC_OON
- ldr r4, =OSCC
-
- /* Spin here until OSCC.OOK get set, meaning the PLL has settled. */
-2:
- ldr r5, [r4]
- ands r5, r5, #1
- beq 2b
-#endif
-.endm
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_ARCH_PXA_MACRO_H__ */
diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
index 4124f0a99..c60dba26b 100644
--- a/arch/arm/include/asm/config.h
+++ b/arch/arm/include/asm/config.h
@@ -21,9 +21,6 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
-/* Relocation to SDRAM works on all ARM boards */
-#define CONFIG_RELOC_FIXUP_WORKS
-
#define CONFIG_LMB
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#endif
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 5438ebc5f..ada3fbb64 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -61,7 +61,6 @@ typedef struct global_data {
unsigned long tbu;
unsigned long long timer_reset_value;
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
unsigned long relocaddr; /* Start address of U-Boot in RAM */
phys_size_t ram_size; /* RAM size */
unsigned long mon_len; /* monitor len */
@@ -71,7 +70,6 @@ typedef struct global_data {
#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
unsigned long tlb_addr;
#endif
-#endif
void **jt; /* jump table */
char env_buf[32]; /* buffer for getenv() before reloc. */
} gd_t;
diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h
index 4ac4f612e..33973a32e 100644
--- a/arch/arm/include/asm/u-boot-arm.h
+++ b/arch/arm/include/asm/u-boot-arm.h
@@ -34,16 +34,12 @@ extern ulong _bss_start_ofs; /* BSS start relative to _start */
extern ulong _bss_end_ofs; /* BSS end relative to _start */
extern ulong IRQ_STACK_START; /* top of IRQ stack */
extern ulong FIQ_STACK_START; /* top of FIQ stack */
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-extern ulong _armboot_start_ofs; /* code start */
-#else
extern ulong _TEXT_BASE; /* code start */
extern ulong _datarel_start_ofs;
extern ulong _datarelrolocal_start_ofs;
extern ulong _datarellocal_start_ofs;
extern ulong _datarelro_start_ofs;
extern ulong IRQ_STACK_START_IN; /* 8 bytes in IRQ stack */
-#endif
/* cpu/.../cpu.c */
int cpu_init(void);
@@ -56,9 +52,7 @@ int arch_misc_init(void);
/* board/.../... */
int board_init(void);
int dram_init (void);
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
void dram_init_banksize (void);
-#endif
void setup_serial_tag (struct tag **params);
void setup_revision_tag (struct tag **params);
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index af9a414b8..1fd5f8362 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -127,11 +127,7 @@ static int init_baudrate (void)
char tmp[64]; /* long enough for environment variables */
int i = getenv_f("baudrate", tmp, sizeof (tmp));
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
gd->baudrate = (i > 0)
-#else
- gd->bd->bi_baudrate = gd->baudrate = (i > 0)
-#endif
? (int) simple_strtoul (tmp, NULL, 10)
: CONFIG_BAUDRATE;
@@ -142,11 +138,7 @@ static int display_banner (void)
{
printf ("\n\n%s\n\n", version_string);
debug ("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
_TEXT_BASE,
-#else
- _armboot_start,
-#endif
_bss_start_ofs+_TEXT_BASE, _bss_end_ofs+_TEXT_BASE);
#ifdef CONFIG_MODEM_SUPPORT
debug ("Modem Support enabled\n");
@@ -190,16 +182,6 @@ static int display_dram_config (void)
return (0);
}
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-#ifndef CONFIG_SYS_NO_FLASH
-static void display_flash_config (ulong size)
-{
- puts ("Flash: ");
- print_size (size, "\n");
-}
-#endif /* CONFIG_SYS_NO_FLASH */
-#endif
-
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
static int init_func_i2c (void)
{
@@ -246,214 +228,6 @@ typedef int (init_fnc_t) (void);
int print_cpuinfo (void);
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-init_fnc_t *init_sequence[] = {
-#if defined(CONFIG_ARCH_CPU_INIT)
- arch_cpu_init, /* basic arch cpu dependent setup */
-#endif
- board_init, /* basic board dependent setup */
-#if defined(CONFIG_USE_IRQ)
- interrupt_init, /* set up exceptions */
-#endif
- timer_init, /* initialize timer */
-#ifdef CONFIG_FSL_ESDHC
- get_clocks,
-#endif
- env_init, /* initialize environment */
- init_baudrate, /* initialze baudrate settings */
- serial_init, /* serial communications setup */
- console_init_f, /* stage 1 init of console */
- display_banner, /* say that we are here */
-#if defined(CONFIG_DISPLAY_CPUINFO)
- print_cpuinfo, /* display cpu info (and speed) */
-#endif
-#if defined(CONFIG_DISPLAY_BOARDINFO)
- checkboard, /* display board info */
-#endif
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
- init_func_i2c,
-#endif
- dram_init, /* configure available RAM banks */
-#if defined(CONFIG_CMD_PCI) || defined (CONFIG_PCI)
- arm_pci_init,
-#endif
- display_dram_config,
- NULL,
-};
-
-void start_armboot (void)
-{
- init_fnc_t **init_fnc_ptr;
- char *s;
-#if defined(CONFIG_VFD) || defined(CONFIG_LCD)
- unsigned long addr;
-#endif
-
- /* Pointer is writable since we allocated a register for it */
- gd = (gd_t*)(_armboot_start - CONFIG_SYS_MALLOC_LEN - sizeof(gd_t));
- /* compiler optimization barrier needed for GCC >= 3.4 */
- __asm__ __volatile__("": : :"memory");
-
- memset ((void*)gd, 0, sizeof (gd_t));
- gd->bd = (bd_t*)((char*)gd - sizeof(bd_t));
- memset (gd->bd, 0, sizeof (bd_t));
-
- gd->flags |= GD_FLG_RELOC;
-
- monitor_flash_len = _bss_start - _armboot_start;
-
- for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
- if ((*init_fnc_ptr)() != 0) {
- hang ();
- }
- }
-
- /* armboot_start is defined in the board-specific linker script */
- mem_malloc_init (_armboot_start - CONFIG_SYS_MALLOC_LEN,
- CONFIG_SYS_MALLOC_LEN);
-
-#ifndef CONFIG_SYS_NO_FLASH
- /* configure available FLASH banks */
- display_flash_config (flash_init ());
-#endif /* CONFIG_SYS_NO_FLASH */
-
-#ifdef CONFIG_VFD
-# ifndef PAGE_SIZE
-# define PAGE_SIZE 4096
-# endif
- /*
- * reserve memory for VFD display (always full pages)
- */
- /* bss_end is defined in the board-specific linker script */
- addr = (_bss_end + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
- vfd_setmem (addr);
- gd->fb_base = addr;
-#endif /* CONFIG_VFD */
-
-#ifdef CONFIG_LCD
- /* board init may have inited fb_base */
- if (!gd->fb_base) {
-# ifndef PAGE_SIZE
-# define PAGE_SIZE 4096
-# endif
- /*
- * reserve memory for LCD display (always full pages)
- */
- /* bss_end is defined in the board-specific linker script */
- addr = (_bss_end + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
- lcd_setmem (addr);
- gd->fb_base = addr;
- }
-#endif /* CONFIG_LCD */
-
-#if defined(CONFIG_CMD_NAND)
- puts ("NAND: ");
- nand_init(); /* go init the NAND */
-#endif
-
-#if defined(CONFIG_CMD_ONENAND)
- onenand_init();
-#endif
-
-#ifdef CONFIG_HAS_DATAFLASH
- AT91F_DataflashInit();
- dataflash_print_info();
-#endif
-
-#ifdef CONFIG_GENERIC_MMC
-/*
- * MMC initialization is called before relocating env.
- * Thus It is required that operations like pin multiplexer
- * be put in board_init.
- */
- puts ("MMC: ");
- mmc_initialize (gd->bd);
-#endif
-
- /* initialize environment */
- env_relocate ();
-
-#ifdef CONFIG_VFD
- /* must do this after the framebuffer is allocated */
- drv_vfd_init();
-#endif /* CONFIG_VFD */
-
-#ifdef CONFIG_SERIAL_MULTI
- serial_initialize();
-#endif
-
- /* IP Address */
- gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
-
- stdio_init (); /* get the devices list going. */
-
- jumptable_init ();
-
-#if defined(CONFIG_API)
- /* Initialize API */
- api_init ();
-#endif
-
- console_init_r (); /* fully init console as a device */
-
-#if defined(CONFIG_ARCH_MISC_INIT)
- /* miscellaneous arch dependent initialisations */
- arch_misc_init ();
-#endif
-#if defined(CONFIG_MISC_INIT_R)
- /* miscellaneous platform dependent initialisations */
- misc_init_r ();
-#endif
-
- /* enable exceptions */
- enable_interrupts ();
-
- /* Perform network card initialisation if necessary */
-
-#if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96)
- /* XXX: this needs to be moved to board init */
- if (getenv ("ethaddr")) {
- uchar enetaddr[6];
- eth_getenv_enetaddr("ethaddr", enetaddr);
- smc_set_mac_addr(enetaddr);
- }
-#endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */
-
- /* Initialize from environment */
- if ((s = getenv ("loadaddr")) != NULL) {
- load_addr = simple_strtoul (s, NULL, 16);
- }
-#if defined(CONFIG_CMD_NET)
- if ((s = getenv ("bootfile")) != NULL) {
- copy_filename (BootFile, s, sizeof (BootFile));
- }
-#endif
-
-#ifdef BOARD_LATE_INIT
- board_late_init ();
-#endif
-
-#ifdef CONFIG_BITBANGMII
- bb_miiphy_init();
-#endif
-#if defined(CONFIG_CMD_NET)
-#if defined(CONFIG_NET_MULTI)
- puts ("Net: ");
-#endif
- eth_initialize(gd->bd);
-#if defined(CONFIG_RESET_PHY_R)
- debug ("Reset Ethernet PHY\n");
- reset_phy();
-#endif
-#endif
- /* main_loop() can return to retry autoboot, if so just run it again. */
- for (;;) {
- main_loop ();
- }
-
- /* NOTREACHED - no way out of command loop except booting */
-}
-#else
void __dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
@@ -679,15 +453,6 @@ void board_init_r (gd_t *id, ulong dest_addr)
#if !defined(CONFIG_SYS_NO_FLASH)
ulong flash_size;
#endif
-#if !defined(CONFIG_RELOC_FIXUP_WORKS)
- extern void malloc_bin_reloc (void);
-#if defined(CONFIG_CMD_BMP)
- extern void bmp_reloc(void);
-#endif
-#if defined(CONFIG_CMD_I2C)
- extern void i2c_reloc(void);
-#endif
-#endif
gd = id;
bd = gd->bd;
@@ -704,39 +469,16 @@ void board_init_r (gd_t *id, ulong dest_addr)
debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
-#if !defined(CONFIG_RELOC_FIXUP_WORKS)
- /*
- * We have to relocate the command table manually
- */
- fixup_cmdtable(&__u_boot_cmd_start,
- (ulong)(&__u_boot_cmd_end - &__u_boot_cmd_start));
-#if defined(CONFIG_CMD_BMP)
- bmp_reloc();
-#endif
-#if defined(CONFIG_CMD_I2C)
- i2c_reloc();
-#endif
-#if defined(CONFIG_CMD_ONENAND)
- onenand_reloc();
-#endif
-#endif /* !defined(CONFIG_RELOC_FIXUP_WORKS) */
-
#ifdef CONFIG_LOGBUFFER
logbuff_init_ptrs ();
#endif
#ifdef CONFIG_POST
post_output_backlog ();
-#ifndef CONFIG_RELOC_FIXUP_WORKS
- post_reloc ();
-#endif
#endif
/* The Malloc area is immediately below the monitor copy in DRAM */
malloc_start = dest_addr - TOTAL_MALLOC_LEN;
mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN);
-#if !defined(CONFIG_RELOC_FIXUP_WORKS)
- malloc_bin_reloc ();
-#endif
#if !defined(CONFIG_SYS_NO_FLASH)
puts ("FLASH: ");
@@ -900,8 +642,6 @@ void board_init_r (gd_t *id, ulong dest_addr)
/* NOTREACHED - no way out of command loop except booting */
}
-#endif /* defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
void hang (void)
{
puts ("### ERROR ### Please RESET the board ###\n");
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index fe6d45987..d9175f058 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -44,7 +44,6 @@ static void cp_delay (void)
asm volatile("" : : : "memory");
}
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
static inline void dram_bank_mmu_setup(int bank)
{
u32 *page_table = (u32 *)gd->tlb_addr;
@@ -58,18 +57,11 @@ static inline void dram_bank_mmu_setup(int bank)
page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
}
}
-#endif
/* to activate the MMU we need to set up virtual memory: use 1M areas */
static inline void mmu_setup(void)
{
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
u32 *page_table = (u32 *)gd->tlb_addr;
-#else
- static u32 __attribute__((aligned(16384))) page_table[4096];
- bd_t *bd = gd->bd;
- int j;
-#endif
int i;
u32 reg;
@@ -77,20 +69,9 @@ static inline void mmu_setup(void)
for (i = 0; i < 4096; i++)
page_table[i] = i << 20 | (3 << 10) | 0x12;
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
dram_bank_mmu_setup(i);
}
-#else
- /* Then, enable cacheable and bufferable for RAM only */
- for (j = 0; j < CONFIG_NR_DRAM_BANKS; j++) {
- for (i = bd->bi_dram[j].start >> 20;
- i < (bd->bi_dram[j].start + bd->bi_dram[j].size) >> 20;
- i++) {
- page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP;
- }
- }
-#endif
/* Copy the page table address to cp15 */
asm volatile("mcr p15, 0, %0, c2, c0, 0"
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 90aa04b87..74ff5ce1c 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -46,12 +46,8 @@ int interrupt_init (void)
/*
* setup up stacks if necessary
*/
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
IRQ_STACK_START = gd->irq_sp - 4;
IRQ_STACK_START_IN = gd->irq_sp + 8;
-#else
- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - GENERATED_GBL_DATA_SIZE - 4;
-#endif
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
return arch_interrupt_init();
@@ -86,7 +82,6 @@ int disable_interrupts (void)
return (old & 0x80) == 0;
}
#else
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
int interrupt_init (void)
{
/*
@@ -96,7 +91,6 @@ int interrupt_init (void)
return 0;
}
-#endif
void enable_interrupts (void)
{
diff --git a/arch/avr32/include/asm/config.h b/arch/avr32/include/asm/config.h
index 049c44eaf..02fbfb3ab 100644
--- a/arch/avr32/include/asm/config.h
+++ b/arch/avr32/include/asm/config.h
@@ -21,4 +21,6 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
+#define CONFIG_NEEDS_MANUAL_RELOC
+
#endif
diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c
index 96ccc7fa7..8b56237f1 100644
--- a/arch/avr32/lib/board.c
+++ b/arch/avr32/lib/board.c
@@ -272,13 +272,13 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
monitor_flash_len = _edata - _text;
-#if !defined(CONFIG_RELOC_FIXUP_WORKS)
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
/*
* We have to relocate the command table manually
*/
fixup_cmdtable(&__u_boot_cmd_start,
(ulong)(&__u_boot_cmd_end - &__u_boot_cmd_start));
-#endif /* !defined(CONFIG_RELOC_FIXUP_WORKS) */
+#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */
/* there are some other pointer constants we must deal with */
#ifndef CONFIG_ENV_IS_NOWHERE
diff --git a/arch/blackfin/include/asm/config.h b/arch/blackfin/include/asm/config.h
index ae6140226..04372525c 100644
--- a/arch/blackfin/include/asm/config.h
+++ b/arch/blackfin/include/asm/config.h
@@ -16,9 +16,6 @@
# define CONFIG_BFIN_SCRATCH_REG retn
#endif
-/* Relocation to SDRAM works on all Blackfin boards */
-#define CONFIG_RELOC_FIXUP_WORKS
-
/* Make sure the structure is properly aligned */
#if ((CONFIG_SYS_GBL_DATA_ADDR & -4) != CONFIG_SYS_GBL_DATA_ADDR)
# error CONFIG_SYS_GBL_DATA_ADDR: must be 4 byte aligned
diff --git a/arch/i386/include/asm/config.h b/arch/i386/include/asm/config.h
index 1952de79f..049c44eaf 100644
--- a/arch/i386/include/asm/config.h
+++ b/arch/i386/include/asm/config.h
@@ -21,6 +21,4 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
-#define CONFIG_RELOC_FIXUP_WORKS
-
#endif
diff --git a/arch/m68k/include/asm/config.h b/arch/m68k/include/asm/config.h
index ec2cc16be..51050a39a 100644
--- a/arch/m68k/include/asm/config.h
+++ b/arch/m68k/include/asm/config.h
@@ -21,6 +21,8 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
+#define CONFIG_NEEDS_MANUAL_RELOC
+
#define CONFIG_LMB
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#define CONFIG_SYS_BOOT_GET_CMDLINE
diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c
index 976d5bf28..9a5190885 100644
--- a/arch/m68k/lib/board.c
+++ b/arch/m68k/lib/board.c
@@ -420,13 +420,13 @@ void board_init_r (gd_t *id, ulong dest_addr)
monitor_flash_len = (ulong)&__init_end - dest_addr;
-#if !defined(CONFIG_RELOC_FIXUP_WORKS)
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
/*
* We have to relocate the command table manually
*/
fixup_cmdtable(&__u_boot_cmd_start,
(ulong)(&__u_boot_cmd_end - &__u_boot_cmd_start));
-#endif /* !defined(CONFIG_RELOC_FIXUP_WORKS) */
+#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */
/* there are some other pointer constants we must deal with */
#ifndef CONFIG_ENV_IS_NOWHERE
diff --git a/arch/microblaze/include/asm/config.h b/arch/microblaze/include/asm/config.h
index 8a9064b3c..049c44eaf 100644
--- a/arch/microblaze/include/asm/config.h
+++ b/arch/microblaze/include/asm/config.h
@@ -21,7 +21,4 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
-/* Relocation to SDRAM works on all Microblaze boards */
-#define CONFIG_RELOC_FIXUP_WORKS
-
#endif
diff --git a/arch/mips/include/asm/config.h b/arch/mips/include/asm/config.h
index 049c44eaf..02fbfb3ab 100644
--- a/arch/mips/include/asm/config.h
+++ b/arch/mips/include/asm/config.h
@@ -21,4 +21,6 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
+#define CONFIG_NEEDS_MANUAL_RELOC
+
#endif
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index 4a22f7b41..f31712415 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -295,13 +295,13 @@ void board_init_r (gd_t *id, ulong dest_addr)
monitor_flash_len = (ulong)&uboot_end_data - dest_addr;
-#if !defined(CONFIG_RELOC_FIXUP_WORKS)
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
/*
* We have to relocate the command table manually
*/
fixup_cmdtable(&__u_boot_cmd_start,
(ulong)(&__u_boot_cmd_end - &__u_boot_cmd_start));
-#endif /* !defined(CONFIG_RELOC_FIXUP_WORKS) */
+#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */
/* there are some other pointer constants we must deal with */
#ifndef CONFIG_ENV_IS_NOWHERE
diff --git a/arch/nios2/include/asm/config.h b/arch/nios2/include/asm/config.h
index 011d603a4..049c44eaf 100644
--- a/arch/nios2/include/asm/config.h
+++ b/arch/nios2/include/asm/config.h
@@ -21,7 +21,4 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
-/* Relocation to SDRAM works on all NIOS2 boards */
-#define CONFIG_RELOC_FIXUP_WORKS
-
#endif
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index a1942ca2b..76dedebe6 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -89,9 +89,6 @@
#define CONFIG_SYS_NUM_TLBCAMS 16
#endif
-/* Relocation to SDRAM works on all PPC boards */
-#define CONFIG_RELOC_FIXUP_WORKS
-
/* Since so many PPC SOCs have a semi-common LBC, define this here */
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) || \
defined(CONFIG_MPC83xx)
diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h
index 978cc92f4..049c44eaf 100644
--- a/arch/sh/include/asm/config.h
+++ b/arch/sh/include/asm/config.h
@@ -21,7 +21,4 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
-/* Relocation to SDRAM works on all sh boards */
-#define CONFIG_RELOC_FIXUP_WORKS
-
#endif
diff --git a/arch/sparc/include/asm/config.h b/arch/sparc/include/asm/config.h
index 6ddc3494c..7b6f30bd4 100644
--- a/arch/sparc/include/asm/config.h
+++ b/arch/sparc/include/asm/config.h
@@ -21,6 +21,8 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
+#define CONFIG_NEEDS_MANUAL_RELOC
+
#define CONFIG_LMB
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
diff --git a/arch/sparc/lib/board.c b/arch/sparc/lib/board.c
index 4a6041f51..ab31cfb50 100644
--- a/arch/sparc/lib/board.c
+++ b/arch/sparc/lib/board.c
@@ -252,13 +252,13 @@ void board_init_f(ulong bootflag)
post_run(NULL, POST_ROM | post_bootmode_get(0));
#endif
-#if !defined(CONFIG_RELOC_FIXUP_WORKS)
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
/*
* We have to relocate the command table manually
*/
fixup_cmdtable(&__u_boot_cmd_start,
(ulong)(&__u_boot_cmd_end - &__u_boot_cmd_start));
-#endif /* !defined(CONFIG_RELOC_FIXUP_WORKS) */
+#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */
#if defined(CONFIG_CMD_AMBAPP) && defined(CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP)
puts("AMBA:\n");