diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-06-12 21:20:37 +0200 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-06-21 16:18:11 +0200 |
| commit | 7a11c7f9747240dc770954d320569596c0fbcb50 (patch) | |
| tree | ddd05598821864416246612aa2e4552e955b553f /include | |
| parent | 3e88337b225bf796f6df21d0a7f591530e9d4ce0 (diff) | |
pm9263: lowlevel init update
move PSRAM init to pm9263.c
this will allow us after to make the nor lowlevel_init generic
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/pm9263.h | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index f0dbe81d1..5ebf28636 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -67,8 +67,6 @@ #define CONFIG_SYS_PIOD_PPUDR_VAL 0xFFFF0000 /* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */ #define CONFIG_SYS_MATRIX_EBI0CSA_VAL 0x0001010A -/* EBI1_CSA, 3.3v, no pull-ups */ -#define CONFIG_SYS_MATRIX_EBI1CSA_VAL 0x00010100 /* SDRAM */ /* SDRAMC_MR Mode register */ @@ -100,13 +98,7 @@ #define CONFIG_SYS_SMC0_SETUP0_VAL 0x0A0A0A0A /* SMC_SETUP */ #define CONFIG_SYS_SMC0_PULSE0_VAL 0x0B0B0B0B /* SMC_PULSE */ #define CONFIG_SYS_SMC0_CYCLE0_VAL 0x00160016 /* SMC_CYCLE */ -#define CONFIG_SYS_SMC0_CTRL0_VAL 0x00161003 /* SMC_MODE */ - -/* setup SMC1, CS0 (PSRAM) - 16-bit */ -#define CONFIG_SYS_SMC1_SETUP0_VAL 0x00000000 /* SMC_SETUP */ -#define CONFIG_SYS_SMC1_PULSE0_VAL 0x07020707 /* SMC_PULSE */ -#define CONFIG_SYS_SMC1_CYCLE0_VAL 0x00080008 /* SMC_CYCLE */ -#define CONFIG_SYS_SMC1_CTRL0_VAL 0x31001000 /* SMC_MODE */ +#define CONFIG_SYS_SMC0_MODE0_VAL 0x00161003 /* SMC_MODE */ #define CONFIG_SYS_RSTC_RMR_VAL 0xA5000301 /* user reset enable */ |