diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2011-01-19 03:05:26 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-01-19 22:58:23 -0600 |
| commit | 243be8e296c53343eb21a6224f5329ff94778a4f (patch) | |
| tree | 617f39e5a350bde99fc6ef340450cabc1707441f /include | |
| parent | dd50af2515ad39fa2f6c09ab621f69fef4f5fceb (diff) | |
powerpc/8xxx: Introduce 85xx, 86xx, QorIQ config headers
Add new headers that capture common defines for a given SoC/processor
rather than duplicating that information in board config.h and random
other places.
Eventually this should be handled by Kconfig & defconfigs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/P4080DS.h | 16 | ||||
| -rw-r--r-- | include/configs/corenet_ds.h | 2 |
2 files changed, 0 insertions, 18 deletions
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index 5c818c903..49f7c534d 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -26,23 +26,7 @@ #define CONFIG_P4080DS #define CONFIG_PHYS_64BIT #define CONFIG_PPC_P4080 -#define CONFIG_SYS_NUM_FMAN 2 -#define CONFIG_SYS_NUM_FM1_DTSEC 4 -#define CONFIG_SYS_NUM_FM2_DTSEC 4 -#define CONFIG_SYS_NUM_FM1_10GEC 1 -#define CONFIG_SYS_NUM_FM2_10GEC 1 -#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */ -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC135 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC136 - -#define CONFIG_SYS_P4080_ERRATUM_CPU22 -#define CONFIG_SYS_FSL_ERRATUM_CPC_A002 -#define CONFIG_SYS_FSL_ERRATUM_CPC_A003 -#define CONFIG_SYS_P4080_ERRATUM_SERDES8 -#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 - #include "corenet_ds.h" diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index fa05baa2b..5e9de901d 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -446,13 +446,11 @@ #define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1f #define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4 -#if (CONFIG_SYS_NUM_FMAN == 2) #define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR 0x1c #define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR 0x1d #define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR 0x1e #define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR 0x1f #define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0 -#endif #define CONFIG_SYS_TBIPA_VALUE 8 #define CONFIG_MII /* MII PHY management */ |