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authorMichael Schwingen <michael@schwingen.org>2011-05-23 00:00:10 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-06-23 08:25:18 +0200
commit973af335e61eede3578371330abd3971805887f5 (patch)
treefab67cbf3d966011ac8eb14294f896d10727ccef /include/configs/ixdpg425.h
parent10c9787e683205aa780dba53fa9f43cdd529bec9 (diff)
update/fix IXDP425 / IXDPG425 boards
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Diffstat (limited to 'include/configs/ixdpg425.h')
-rw-r--r--include/configs/ixdpg425.h11
1 files changed, 8 insertions, 3 deletions
diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h
index 637fd7d4f..3de001371 100644
--- a/include/configs/ixdpg425.h
+++ b/include/configs/ixdpg425.h
@@ -53,9 +53,6 @@
/*
* Misc configuration options
*/
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-#define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */
-#define CONFIG_TIMER_IRQ
#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */
#define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */
@@ -115,6 +112,7 @@
#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */
+#define CONFIG_IXP425_TIMER_CLK 66666666
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/* valid baudrates */
@@ -179,6 +177,8 @@
#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
+#define CONFIG_SYS_TEXT_BASE 0x50000000
+
#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */
@@ -248,4 +248,9 @@
*/
#define CONFIG_SYS_CACHELINE_SIZE 32
+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_SDRAM_BASE 0
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
#endif /* __CONFIG_H */