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authorWolfgang Denk <wd@denx.de>2012-04-16 23:01:12 +0200
committerWolfgang Denk <wd@denx.de>2012-04-16 23:01:12 +0200
commitdb39f24151627733d6166c5e9a875fe8b356fa72 (patch)
treed091e23af47b9ae848c6f69144f941d9f072aae6 /drivers
parentb64c2420e02a7d068aae6e0d069f270feb3cdc9a (diff)
parent2694bb9bcc8ca9636faf38c866dda7bf0529e35f (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: ARM926EJS: Fix cache.c to comply with checkpatch.pl ARM926EJS: Make asm routines volatile in cache ops MX35: mx35pdk: wrong board revision ARM1136: MX35: Make asm routines volatile in cache ops ARM: add u-boot.imx as target for i.MX SOCs M28: Pull out CONFIG_APBH_DMA so it's always enabled DMA: Split the APBH DMA init into block and channel init imx: Return gpio_set_value in gpio_direction_output imx: Use GPIO_TO_PORT macro in the gpio driver instead of (gpio >> 5) imx: Add GPIO_TO_PORT macro in the mxc_gpio driver imx: Remove unneeded/repititive definitions from imx headers i.MX28: Allow coexistence of PIO and DMA mode for SD/MMC MX31: mx31pdk: drop enable_caches from board file i.MX28: Fix initial stack pointer position mx35: mx35pdk: fix when cache functions are linked mx35: flea3: fix when cache functions are linked ARM: 926ejs: use debug() for misaligned addresses ARM1136: add cache flush and invalidate operations mx6qsabrelite: Fix the serial console port mx6qsabrelite: Add boot switch setting information into the README i.MX6: mx6qsabrelite: add cache commands if cache is enabled i.MX6: implement enable_caches() i.MX6: define CACHELINE_SIZE MX53: DDR: Fix ZQHWCTRL field TZQ_CS mx28evk: Add a README file mx28: Split the README into a common part and a m28 specific part tricorder: Load kernel from ubifs tricorder: Add UBIFS cm-t35: fix Ethernet reset timing hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORT BeagleBoard: Remove userbutton command and use gpio command instead OMAP: Move omap1510inn to Unmaintained / Orphaned
Diffstat (limited to 'drivers')
-rw-r--r--drivers/dma/apbh_dma.c38
-rw-r--r--drivers/gpio/mxc_gpio.c12
-rw-r--r--drivers/mmc/mxsmmc.c53
-rw-r--r--drivers/mtd/nand/mxs_nand.c11
4 files changed, 84 insertions, 30 deletions
diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index c086629b0..cb2193ec5 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -316,7 +316,7 @@ static int mxs_dma_request(int channel)
* The channel will NOT be released if it's marked "busy" (see
* mxs_dma_enable()).
*/
-static int mxs_dma_release(int channel)
+int mxs_dma_release(int channel)
{
struct mxs_dma_chan *pchan;
int ret;
@@ -552,12 +552,10 @@ int mxs_dma_go(int chan)
/*
* Initialize the DMA hardware
*/
-int mxs_dma_init(void)
+void mxs_dma_init(void)
{
struct mx28_apbh_regs *apbh_regs =
(struct mx28_apbh_regs *)MXS_APBH_BASE;
- struct mxs_dma_chan *pchan;
- int ret, channel;
mx28_reset_block(&apbh_regs->hw_apbh_ctrl0_reg);
@@ -576,28 +574,26 @@ int mxs_dma_init(void)
writel(APBH_CTRL0_APB_BURST_EN,
&apbh_regs->hw_apbh_ctrl0_clr);
#endif
+}
- for (channel = 0; channel < MXS_MAX_DMA_CHANNELS; channel++) {
- pchan = mxs_dma_channels + channel;
- pchan->flags = MXS_DMA_FLAGS_VALID;
-
- ret = mxs_dma_request(channel);
+int mxs_dma_init_channel(int channel)
+{
+ struct mxs_dma_chan *pchan;
+ int ret;
- if (ret) {
- printf("MXS DMA: Can't acquire DMA channel %i\n",
- channel);
+ pchan = mxs_dma_channels + channel;
+ pchan->flags = MXS_DMA_FLAGS_VALID;
- goto err;
- }
+ ret = mxs_dma_request(channel);
- mxs_dma_reset(channel);
- mxs_dma_ack_irq(channel);
+ if (ret) {
+ printf("MXS DMA: Can't acquire DMA channel %i\n",
+ channel);
+ return ret;
}
- return 0;
+ mxs_dma_reset(channel);
+ mxs_dma_ack_irq(channel);
-err:
- while (--channel >= 0)
- mxs_dma_release(channel);
- return ret;
+ return 0;
}
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index df6bbbbc4..f1b1c16b1 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -34,6 +34,7 @@ enum mxc_gpio_direction {
MXC_GPIO_DIRECTION_OUT,
};
+#define GPIO_TO_PORT(n) (n / 32)
/* GPIO port description */
static unsigned long gpio_ports[] = {
@@ -53,7 +54,7 @@ static unsigned long gpio_ports[] = {
static int mxc_gpio_direction(unsigned int gpio,
enum mxc_gpio_direction direction)
{
- unsigned int port = gpio >> 5;
+ unsigned int port = GPIO_TO_PORT(gpio);
struct gpio_regs *regs;
u32 l;
@@ -80,7 +81,7 @@ static int mxc_gpio_direction(unsigned int gpio,
int gpio_set_value(unsigned gpio, int value)
{
- unsigned int port = gpio >> 5;
+ unsigned int port = GPIO_TO_PORT(gpio);
struct gpio_regs *regs;
u32 l;
@@ -103,7 +104,7 @@ int gpio_set_value(unsigned gpio, int value)
int gpio_get_value(unsigned gpio)
{
- unsigned int port = gpio >> 5;
+ unsigned int port = GPIO_TO_PORT(gpio);
struct gpio_regs *regs;
u32 val;
@@ -121,7 +122,7 @@ int gpio_get_value(unsigned gpio)
int gpio_request(unsigned gpio, const char *label)
{
- unsigned int port = gpio >> 5;
+ unsigned int port = GPIO_TO_PORT(gpio);
if (port >= ARRAY_SIZE(gpio_ports))
return -1;
return 0;
@@ -144,6 +145,5 @@ int gpio_direction_output(unsigned gpio, int value)
if (ret < 0)
return ret;
- gpio_set_value(gpio, value);
- return 0;
+ return gpio_set_value(gpio, value);
}
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index e8bad9dc7..35c6bdabb 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -43,6 +43,13 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/dma.h>
+/*
+ * CONFIG_MXS_MMC_DMA: This feature is highly experimental and has no
+ * performance benefit unless you operate the platform with
+ * data cache enabled. This is disabled by default, enable
+ * only if you know what you're doing.
+ */
+
struct mxsmmc_priv {
int id;
struct mx28_ssp_regs *regs;
@@ -66,8 +73,13 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
struct mx28_ssp_regs *ssp_regs = priv->regs;
uint32_t reg;
int timeout;
- uint32_t data_count, cache_data_count;
+ uint32_t data_count;
uint32_t ctrl0;
+#ifndef CONFIG_MXS_MMC_DMA
+ uint32_t *data_ptr;
+#else
+ uint32_t cache_data_count;
+#endif
debug("MMC%d: CMD%d\n", mmc->block_dev.dev, cmd->cmdidx);
@@ -185,7 +197,9 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
return 0;
data_count = data->blocksize * data->blocks;
+ timeout = MXSMMC_MAX_TIMEOUT;
+#ifdef CONFIG_MXS_MMC_DMA
if (data_count % ARCH_DMA_MINALIGN)
cache_data_count = roundup(data_count, ARCH_DMA_MINALIGN);
else
@@ -218,6 +232,38 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
invalidate_dcache_range((uint32_t)priv->desc->cmd.address,
(uint32_t)(priv->desc->cmd.address + cache_data_count));
}
+#else
+ if (data->flags & MMC_DATA_READ) {
+ data_ptr = (uint32_t *)data->dest;
+ while (data_count && --timeout) {
+ reg = readl(&ssp_regs->hw_ssp_status);
+ if (!(reg & SSP_STATUS_FIFO_EMPTY)) {
+ *data_ptr++ = readl(&ssp_regs->hw_ssp_data);
+ data_count -= 4;
+ timeout = MXSMMC_MAX_TIMEOUT;
+ } else
+ udelay(1000);
+ }
+ } else {
+ data_ptr = (uint32_t *)data->src;
+ timeout *= 100;
+ while (data_count && --timeout) {
+ reg = readl(&ssp_regs->hw_ssp_status);
+ if (!(reg & SSP_STATUS_FIFO_FULL)) {
+ writel(*data_ptr++, &ssp_regs->hw_ssp_data);
+ data_count -= 4;
+ timeout = MXSMMC_MAX_TIMEOUT;
+ } else
+ udelay(1000);
+ }
+ }
+
+ if (!timeout) {
+ printf("MMC%d: Data timeout with command %d (status 0x%08x)!\n",
+ mmc->block_dev.dev, cmd->cmdidx, reg);
+ return COMM_ERR;
+ }
+#endif
/* Check data errors */
reg = readl(&ssp_regs->hw_ssp_status);
@@ -292,6 +338,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
struct mmc *mmc = NULL;
struct mxsmmc_priv *priv = NULL;
+ int ret;
mmc = malloc(sizeof(struct mmc));
if (!mmc)
@@ -310,6 +357,10 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
return -ENOMEM;
}
+ ret = mxs_dma_init_channel(id);
+ if (ret)
+ return ret;
+
priv->mmc_is_wp = wp;
priv->id = id;
switch (id) {
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 4b1297a2f..9c9581105 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1058,7 +1058,7 @@ int mxs_nand_init(struct mxs_nand_info *info)
{
struct mx28_gpmi_regs *gpmi_regs =
(struct mx28_gpmi_regs *)MXS_GPMI_BASE;
- int i = 0;
+ int i = 0, j;
info->desc = malloc(sizeof(struct mxs_dma_desc *) *
MXS_NAND_DMA_DESCRIPTOR_COUNT);
@@ -1073,7 +1073,11 @@ int mxs_nand_init(struct mxs_nand_info *info)
}
/* Init the DMA controller. */
- mxs_dma_init();
+ for (j = MXS_DMA_CHANNEL_AHB_APBH_GPMI0;
+ j <= MXS_DMA_CHANNEL_AHB_APBH_GPMI7; j++) {
+ if (mxs_dma_init_channel(j))
+ goto err3;
+ }
/* Reset the GPMI block. */
mx28_reset_block(&gpmi_regs->hw_gpmi_ctrl0_reg);
@@ -1089,6 +1093,9 @@ int mxs_nand_init(struct mxs_nand_info *info)
return 0;
+err3:
+ for (--j; j >= 0; j--)
+ mxs_dma_release(j);
err2:
free(info->desc);
err1: