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authorwdenk <wdenk>2003-10-09 20:09:04 +0000
committerwdenk <wdenk>2003-10-09 20:09:04 +0000
commit5da627a424b3ad2d38a81886ba4a18e5123a6788 (patch)
tree13d274effe8b9c740a07f4cb47989f3215c20bb4 /cpu/mips/cpu.c
parent15647dc7fd86bbaeb68740929ecb9f8473c7ceae (diff)
* Patch by Steven Scholz, 10 Oct 2003LABEL_2003_10_09_2320
- Add support for Altera FPGA ACEX1K * Patches by Thomas Lange, 09 Oct 2003: - Endian swap ATA identity for all big endian CPUs, not just PPC - MIPS only: New option CONFIG_MEMSIZE_IN_BYTES for passing memsize args to linux - add support for dbau1x00 board (MIPS32)
Diffstat (limited to 'cpu/mips/cpu.c')
-rw-r--r--cpu/mips/cpu.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c
index c27abbdd1..e73d13845 100644
--- a/cpu/mips/cpu.c
+++ b/cpu/mips/cpu.c
@@ -24,6 +24,7 @@
#include <common.h>
#include <command.h>
#include <asm/inca-ip.h>
+#include <asm/mipsregs.h>
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -42,3 +43,12 @@ void flush_cache (ulong start_addr, ulong size)
{
}
+
+void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ){
+ write_32bit_cp0_register(CP0_ENTRYLO0, low0);
+ write_32bit_cp0_register(CP0_PAGEMASK, pagemask);
+ write_32bit_cp0_register(CP0_ENTRYLO1, low1);
+ write_32bit_cp0_register(CP0_ENTRYHI, hi);
+ write_32bit_cp0_register(CP0_INDEX, index);
+ tlb_write_indexed();
+}