diff options
| author | Timur Tabi <timur@freescale.com> | 2010-03-05 21:29:26 +0000 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-11-12 09:45:16 -0600 |
| commit | 46299078e6b99f6252a4328a12fa0b3305d04b5e (patch) | |
| tree | d84eb709947db7bac318ab120411ce184ad377e1 /board/freescale/corenet_ds | |
| parent | 0ce8437f3006f86d093f83120c64f657bbac3c31 (diff) | |
powerpc/corenet_ds: display the RCW at boot
Display the 64-byte Reset Configuration Word (RCW) during boot, so that
there's no confusion as to what RCW U-boot is using.
Reset Configuration Word (RCW):
00000000: 4a500000 00000000 18181818 00008888
00000010: 28402400 00002000 fe800000 01200000
00000020: 00000000 00000000 00000000 000b0000
00000030: 00000000 00000000 00000000 00000000
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/corenet_ds')
| -rw-r--r-- | board/freescale/corenet_ds/corenet_ds.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c index 68c63ac02..f183cf61d 100644 --- a/board/freescale/corenet_ds/corenet_ds.c +++ b/board/freescale/corenet_ds/corenet_ds.c @@ -45,6 +45,8 @@ int checkboard (void) { u8 sw; struct cpu_type *cpu = gd->cpu; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + unsigned int i; printf("Board: %sDS, ", cpu->name); printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", @@ -66,6 +68,19 @@ int checkboard (void) puts("36-bit Addressing\n"); #endif + /* Display the RCW, so that no one gets confused as to what RCW + * we're actually using for this boot. + */ + puts("Reset Configuration Word (RCW):"); + for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) { + u32 rcw = in_be32(&gur->rcwsr[i]); + + if ((i % 4) == 0) + printf("\n %08x:", i * 4); + printf(" %08x", rcw); + } + puts("\n"); + /* Display the actual SERDES reference clocks as configured by the * dip switches on the board. Note that the SWx registers could * technically be set to force the reference clocks to match the |