aboutsummaryrefslogtreecommitdiff
path: root/board/evb64260
diff options
context:
space:
mode:
authorwdenk <wdenk>2003-06-27 21:31:46 +0000
committerwdenk <wdenk>2003-06-27 21:31:46 +0000
commit8bde7f776c77b343aca29b8c7b58464d915ac245 (patch)
tree20f1fd99975215e7c658454a15cdb4ed4694e2d4 /board/evb64260
parent993cad9364c6b87ae429d1ed1130d8153f6f027e (diff)
downloadu-boot-linaro-stable-8bde7f776c77b343aca29b8c7b58464d915ac245.tar.gz
* Code cleanup:LABEL_2003_06_27_2340
- remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
Diffstat (limited to 'board/evb64260')
-rw-r--r--board/evb64260/Makefile2
-rw-r--r--board/evb64260/eth.c8
-rw-r--r--board/evb64260/eth_addrtbl.c96
-rw-r--r--board/evb64260/eth_addrtbl.h17
-rw-r--r--board/evb64260/evb64260.c81
-rw-r--r--board/evb64260/flash.c4
-rw-r--r--board/evb64260/memory.c132
-rw-r--r--board/evb64260/misc.S46
-rw-r--r--board/evb64260/mpsc.c12
-rw-r--r--board/evb64260/pci.c108
-rw-r--r--board/evb64260/sdram_init.c14
-rw-r--r--board/evb64260/u-boot.lds5
-rw-r--r--board/evb64260/zuma_pbb.c24
-rw-r--r--board/evb64260/zuma_pbb.h4
14 files changed, 288 insertions, 265 deletions
diff --git a/board/evb64260/Makefile b/board/evb64260/Makefile
index 31e24df43..c493d6cf9 100644
--- a/board/evb64260/Makefile
+++ b/board/evb64260/Makefile
@@ -32,7 +32,7 @@ OBJS = $(BOARD).o flash.o serial.o memory.o pci.o \
$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
+ $(AR) crv $@ $(OBJS) $(SOBJS)
#########################################################################
diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c
index 76cf38aeb..8b3a35923 100644
--- a/board/evb64260/eth.c
+++ b/board/evb64260/eth.c
@@ -117,12 +117,12 @@ static void gt6426x_handle_SMI(struct eth_dev_s *p, unsigned int icr)
printf("SMI interrupt: ");
if(icr&0x20000000) {
- printf("SMI done\n");
+ printf("SMI done\n");
}
#endif
if(icr&0x10000000) {
- unsigned int psr;
+ unsigned int psr;
psr=GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + p->reg_base);
#ifdef DEBUG
printf("PHY state change:\n"
@@ -134,7 +134,7 @@ static void gt6426x_handle_SMI(struct eth_dev_s *p, unsigned int icr)
#ifdef CONFIG_INTEL_LXT97X /* non-standard mii reg (intel lxt972a) */
{
- unsigned short mii_11;
+ unsigned short mii_11;
mii_11=miiphy_read_ret(ether_port_phy_addr[p->dev],0x11);
printf(" mii:%s:%s:%s:%s %s:%s %s\n",
@@ -381,7 +381,7 @@ static void
gt6426x_dump_mii(bd_t *bis, unsigned short phy)
{
printf("mii reg 0 - 3: %04x %04x %04x %04x\n",
- miiphy_read_ret(phy, 0x0),
+ miiphy_read_ret(phy, 0x0),
miiphy_read_ret(phy, 0x1),
miiphy_read_ret(phy, 0x2),
miiphy_read_ret(phy, 0x3)
diff --git a/board/evb64260/eth_addrtbl.c b/board/evb64260/eth_addrtbl.c
index ea4925a9d..ef463c329 100644
--- a/board/evb64260/eth_addrtbl.c
+++ b/board/evb64260/eth_addrtbl.c
@@ -52,7 +52,7 @@ unsigned int initAddressTable( u32 port, u32 hashMode, u32 hashSizeSelector)
tableBase = (unsigned int)addressTableBase[port];
/* we get called for every probe, so only do this once */
if ( !tableBase ) {
- int bytes = hashLength[hashSizeSelector] * sizeof(addrTblEntry);
+ int bytes = hashLength[hashSizeSelector] * sizeof(addrTblEntry);
tableBase = (unsigned int)realAddrTableBase[port] = malloc(bytes+64);
@@ -62,12 +62,12 @@ unsigned int initAddressTable( u32 port, u32 hashMode, u32 hashSizeSelector)
return 0;
}
- /* align to octal byte */
+ /* align to octal byte */
if(tableBase&63) tableBase=(tableBase+63) & ~63;
- addressTableHashMode[port] = hashMode;
+ addressTableHashMode[port] = hashMode;
addressTableHashSize[port] = hashSizeSelector;
- addressTableBase[port] = (addrTblEntry *)tableBase;
+ addressTableBase[port] = (addrTblEntry *)tableBase;
memset((void *)tableBase,0,bytes);
}
@@ -105,40 +105,40 @@ hashTableFunction( u32 macH, u32 macL, u32 HashSize, u32 hash_mode)
addrL = NIBBLE_SWAPPING_32_BIT( macL );
addrHSwapped = FLIP_4_BITS( addrH & 0xf )
- + ((FLIP_4_BITS( (addrH >> 4) & 0xf)) << 4)
- + ((FLIP_4_BITS( (addrH >> 8) & 0xf)) << 8)
- + ((FLIP_4_BITS( (addrH >> 12) & 0xf)) << 12);
+ + ((FLIP_4_BITS( (addrH >> 4) & 0xf)) << 4)
+ + ((FLIP_4_BITS( (addrH >> 8) & 0xf)) << 8)
+ + ((FLIP_4_BITS( (addrH >> 12) & 0xf)) << 12);
addrLSwapped = FLIP_4_BITS( addrL & 0xf )
- + ((FLIP_4_BITS( (addrL >> 4) & 0xf)) << 4)
- + ((FLIP_4_BITS( (addrL >> 8) & 0xf)) << 8)
- + ((FLIP_4_BITS( (addrL >> 12) & 0xf)) << 12)
- + ((FLIP_4_BITS( (addrL >> 16) & 0xf)) << 16)
- + ((FLIP_4_BITS( (addrL >> 20) & 0xf)) << 20)
- + ((FLIP_4_BITS( (addrL >> 24) & 0xf)) << 24)
- + ((FLIP_4_BITS( (addrL >> 28) & 0xf)) << 28);
+ + ((FLIP_4_BITS( (addrL >> 4) & 0xf)) << 4)
+ + ((FLIP_4_BITS( (addrL >> 8) & 0xf)) << 8)
+ + ((FLIP_4_BITS( (addrL >> 12) & 0xf)) << 12)
+ + ((FLIP_4_BITS( (addrL >> 16) & 0xf)) << 16)
+ + ((FLIP_4_BITS( (addrL >> 20) & 0xf)) << 20)
+ + ((FLIP_4_BITS( (addrL >> 24) & 0xf)) << 24)
+ + ((FLIP_4_BITS( (addrL >> 28) & 0xf)) << 28);
addrH = addrHSwapped;
addrL = addrLSwapped;
if( hash_mode == 0 ) {
- addr0 = (addrL >> 2) & 0x03f;
- addr1 = (addrL & 0x003) | ((addrL >> 8) & 0x7f) << 2;
- addr2 = (addrL >> 15) & 0x1ff;
- addr3 = ((addrL >> 24) & 0x0ff) | ((addrH & 1) << 8);
+ addr0 = (addrL >> 2) & 0x03f;
+ addr1 = (addrL & 0x003) | ((addrL >> 8) & 0x7f) << 2;
+ addr2 = (addrL >> 15) & 0x1ff;
+ addr3 = ((addrL >> 24) & 0x0ff) | ((addrH & 1) << 8);
} else {
- addr0 = FLIP_6_BITS( addrL & 0x03f );
- addr1 = FLIP_9_BITS( ((addrL >> 6) & 0x1ff));
- addr2 = FLIP_9_BITS( (addrL >> 15) & 0x1ff);
- addr3 = FLIP_9_BITS( (((addrL >> 24) & 0x0ff) | ((addrH & 0x1) << 8)));
+ addr0 = FLIP_6_BITS( addrL & 0x03f );
+ addr1 = FLIP_9_BITS( ((addrL >> 6) & 0x1ff));
+ addr2 = FLIP_9_BITS( (addrL >> 15) & 0x1ff);
+ addr3 = FLIP_9_BITS( (((addrL >> 24) & 0x0ff) | ((addrH & 0x1) << 8)));
}
hashResult = (addr0 << 9) | (addr1 ^ addr2 ^ addr3);
if( HashSize == _8K_TABLE ) {
- hashResult = hashResult & 0xffff;
+ hashResult = hashResult & 0xffff;
} else {
- hashResult = hashResult & 0x07ff;
+ hashResult = hashResult & 0x07ff;
}
return( hashResult );
@@ -174,20 +174,20 @@ addAddressTableEntry(
u32 i;
newLo = (((macH >> 4) & 0xf) << 15)
- | (((macH >> 0) & 0xf) << 11)
- | (((macH >> 12) & 0xf) << 7)
- | (((macH >> 8) & 0xf) << 3)
- | (((macL >> 20) & 0x1) << 31)
- | (((macL >> 16) & 0xf) << 27)
- | (((macL >> 28) & 0xf) << 23)
- | (((macL >> 24) & 0xf) << 19)
- | (skip << SKIP_BIT) | (rd << 2) | VALID;
+ | (((macH >> 0) & 0xf) << 11)
+ | (((macH >> 12) & 0xf) << 7)
+ | (((macH >> 8) & 0xf) << 3)
+ | (((macL >> 20) & 0x1) << 31)
+ | (((macL >> 16) & 0xf) << 27)
+ | (((macL >> 28) & 0xf) << 23)
+ | (((macL >> 24) & 0xf) << 19)
+ | (skip << SKIP_BIT) | (rd << 2) | VALID;
newHi = (((macL >> 4) & 0xf) << 15)
- | (((macL >> 0) & 0xf) << 11)
- | (((macL >> 12) & 0xf) << 7)
- | (((macL >> 8) & 0xf) << 3)
- | (((macL >> 21) & 0x7) << 0);
+ | (((macL >> 0) & 0xf) << 11)
+ | (((macL >> 12) & 0xf) << 7)
+ | (((macL >> 8) & 0xf) << 3)
+ | (((macL >> 21) & 0x7) << 0);
/*
* Pick the appropriate table, start scanning for free/reusable
@@ -195,22 +195,22 @@ addAddressTableEntry(
*/
entry = addressTableBase[port];
entry += hashTableFunction( macH, macL, addressTableHashSize[port],
- addressTableHashMode[port] );
+ addressTableHashMode[port] );
for( i = 0; i < HOP_NUMBER; i++, entry++ ) {
- if( !(entry->lo & VALID) /*|| (entry->lo & SKIP)*/ ) {
- break;
- } else { /* if same address put in same position */
- if( ((entry->lo & 0xfffffff8) == (newLo & 0xfffffff8))
- && (entry->hi == newHi) )
- {
- break;
- }
- }
+ if( !(entry->lo & VALID) /*|| (entry->lo & SKIP)*/ ) {
+ break;
+ } else { /* if same address put in same position */
+ if( ((entry->lo & 0xfffffff8) == (newLo & 0xfffffff8))
+ && (entry->hi == newHi) )
+ {
+ break;
+ }
+ }
}
if( i == HOP_NUMBER ) {
- PRINTF( "addGT64260addressTableEntry: table section is full\n" );
- return( FALSE );
+ PRINTF( "addGT64260addressTableEntry: table section is full\n" );
+ return( FALSE );
}
/*
diff --git a/board/evb64260/eth_addrtbl.h b/board/evb64260/eth_addrtbl.h
index 60380c63a..5a62c67e1 100644
--- a/board/evb64260/eth_addrtbl.h
+++ b/board/evb64260/eth_addrtbl.h
@@ -25,22 +25,22 @@
* XXX_MIKE - potential sign-extension bugs lurk here...
*/
#define NIBBLE_SWAPPING_32_BIT(X) ( (((X) & 0xf0f0f0f0) >> 4) \
- | (((X) & 0x0f0f0f0f) << 4) )
+ | (((X) & 0x0f0f0f0f) << 4) )
#define NIBBLE_SWAPPING_16_BIT(X) ( (((X) & 0x0000f0f0) >> 4) \
- | (((X) & 0x00000f0f) << 4) )
+ | (((X) & 0x00000f0f) << 4) )
#define FLIP_4_BITS(X) ( (((X) & 0x01) << 3) | (((X) & 0x002) << 1) \
- | (((X) & 0x04) >> 1) | (((X) & 0x008) >> 3) )
+ | (((X) & 0x04) >> 1) | (((X) & 0x008) >> 3) )
#define FLIP_6_BITS(X) ( (((X) & 0x01) << 5) | (((X) & 0x020) >> 5) \
- | (((X) & 0x02) << 3) | (((X) & 0x010) >> 3) \
- | (((X) & 0x04) << 1) | (((X) & 0x008) >> 1) )
+ | (((X) & 0x02) << 3) | (((X) & 0x010) >> 3) \
+ | (((X) & 0x04) << 1) | (((X) & 0x008) >> 1) )
#define FLIP_9_BITS(X) ( (((X) & 0x01) << 8) | (((X) & 0x100) >> 8) \
- | (((X) & 0x02) << 6) | (((X) & 0x080) >> 6) \
- | (((X) & 0x04) << 4) | (((X) & 0x040) >> 4) \
- | ((X) & 0x10) | (((X) & 0x08) << 2) | (((X) & 0x020) >> 2) )
+ | (((X) & 0x02) << 6) | (((X) & 0x080) >> 6) \
+ | (((X) & 0x04) << 4) | (((X) & 0x040) >> 4) \
+ | ((X) & 0x10) | (((X) & 0x08) << 2) | (((X) & 0x020) >> 2) )
/*
* V: value we're operating on
@@ -64,7 +64,6 @@
#define DCACHE_FLUSH_N_SYNC( A, N ) flush_dcache_range( (A), ((A)+(N)) )
-
typedef struct addressTableEntryStruct {
u32 hi;
u32 lo;
diff --git a/board/evb64260/evb64260.c b/board/evb64260/evb64260.c
index 02431dab5..fd09690b8 100644
--- a/board/evb64260/evb64260.c
+++ b/board/evb64260/evb64260.c
@@ -218,18 +218,18 @@ int board_pre_init (void)
/* ----- DEVICE BUS SETTINGS ------ */
- /*
+ /*
* EVB
- * 0 - SRAM
- * 1 - RTC
- * 2 - UART
- * 3 - Flash
- * boot - BootCS
+ * 0 - SRAM
+ * 1 - RTC
+ * 2 - UART
+ * 3 - Flash
+ * boot - BootCS
*
* Zuma
* 0 - Flash
* boot - BootCS
- */
+ */
/*
* the dual 7450 module requires burst access to the boot
@@ -352,40 +352,40 @@ void
debug_led(int led, int mode)
{
#ifndef CONFIG_ZUMA_V2
- volatile int *addr = NULL;
- int dummy;
-
- if (mode == 1) {
- switch (led) {
- case 0:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x08000);
- break;
-
- case 1:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x0c000);
- break;
-
- case 2:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x10000);
- break;
- }
- } else if (mode == 0) {
- switch (led) {
- case 0:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x14000);
- break;
-
- case 1:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x18000);
- break;
-
- case 2:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x1c000);
- break;
- }
- }
+ volatile int *addr = NULL;
+ int dummy;
+
+ if (mode == 1) {
+ switch (led) {
+ case 0:
+ addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x08000);
+ break;
+
+ case 1:
+ addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x0c000);
+ break;
+
+ case 2:
+ addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x10000);
+ break;
+ }
+ } else if (mode == 0) {
+ switch (led) {
+ case 0:
+ addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x14000);
+ break;
+
+ case 1:
+ addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x18000);
+ break;
+
+ case 2:
+ addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x1c000);
+ break;
+ }
+ }
WRITE_CHAR(addr, 0);
- dummy = *addr;
+ dummy = *addr;
#endif /* CONFIG_ZUMA_V2 */
}
@@ -436,4 +436,3 @@ display_mem_map(void)
printf(" BOOT: base - 0x%08x\tsize - %dM bytes\twidth - %d bits\n",
base, size>>20, width);
}
-
diff --git a/board/evb64260/flash.c b/board/evb64260/flash.c
index 2d2bf1c8e..c89739333 100644
--- a/board/evb64260/flash.c
+++ b/board/evb64260/flash.c
@@ -240,8 +240,8 @@ flash_print_info (flash_info_t *info)
static inline void flash_cmd(int width, volatile unsigned char *addr, int offset, unsigned char cmd)
{
- /* supports 1x8, 1x16, and 2x16 */
- /* 2x8 and 4x8 are not supported */
+ /* supports 1x8, 1x16, and 2x16 */
+ /* 2x8 and 4x8 are not supported */
if(width==4) {
/* assuming chips are in 16 bit mode */
/* 2x16 */
diff --git a/board/evb64260/memory.c b/board/evb64260/memory.c
index 9d301f86c..e33985445 100644
--- a/board/evb64260/memory.c
+++ b/board/evb64260/memory.c
@@ -103,9 +103,9 @@ unsigned int memoryGetBankSize(MEMORY_BANK bank)
GT_REG_READ(highAddress,&highValue);
highValue = (highValue + 1) << 20;
if(base > highValue)
- size=0;
+ size=0;
else
- size = highValue - base;
+ size = highValue - base;
return size;
}
@@ -127,16 +127,16 @@ unsigned int memoryGetDeviceSize(DEVICE device)
GT_REG_READ(highAddress,&highValue);
if (highValue == 0xfff)
{
- size = (~base) + 1; /* what the heck is this? */
- return size;
+ size = (~base) + 1; /* what the heck is this? */
+ return size;
}
else
- highValue = (highValue + 1) << 20;
+ highValue = (highValue + 1) << 20;
if(base > highValue)
- size=0;
+ size=0;
else
- size = highValue - base;
+ size = highValue - base;
return size;
}
@@ -159,16 +159,16 @@ unsigned int memoryGetDeviceWidth(DEVICE device)
width = (regValue & 0x00300000) >> 20;
switch (width)
{
- case 0:
- return 1;
- case 1:
- return 2;
- case 2:
- return 4;
- case 3:
- return 8;
- default:
- return 0;
+ case 0:
+ return 1;
+ case 1:
+ return 2;
+ case 2:
+ return 4;
+ case 3:
+ return 8;
+ default:
+ return 0;
}
}
@@ -265,23 +265,23 @@ unsigned int memoryGetInternalRegistersSpace(void)
* Returns: false if one of the parameters is wrong and true else
*********************************************************************/
bool memorySetProtectRegion(MEMORY_PROTECT_REGION region,
- MEMORY_ACCESS memAccess,
- MEMORY_ACCESS_WRITE memWrite,
- MEMORY_CACHE_PROTECT cacheProtection,
- unsigned int baseAddress,
- unsigned int regionLength)
+ MEMORY_ACCESS memAccess,
+ MEMORY_ACCESS_WRITE memWrite,
+ MEMORY_CACHE_PROTECT cacheProtection,
+ unsigned int baseAddress,
+ unsigned int regionLength)
{
unsigned int protectHigh = baseAddress + regionLength;
if(regionLength == 0) /* closing the region */
{
- GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,0x0000ffff);
- GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,0);
- return true;
+ GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,0x0000ffff);
+ GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,0);
+ return true;
}
baseAddress = (baseAddress & 0xfff00000) >> 20;
baseAddress = baseAddress | memAccess << 16 | memWrite << 17
- | cacheProtection << 18;
+ | cacheProtection << 18;
GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,baseAddress);
protectHigh = (protectHigh & 0xfff00000) >> 20;
GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,protectHigh - 1);
@@ -304,9 +304,9 @@ bool memorySetProtectRegion(MEMORY_PROTECT_REGION region,
* Returns: false if one of the parameters is wrong and true else
*********************************************************************/
bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region,
- MEMORY_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength)
+ MEMORY_SNOOP_TYPE snoopType,
+ unsigned int baseAddress,
+ unsigned int regionLength)
{
unsigned int snoopXbaseAddress;
unsigned int snoopXtopAddress;
@@ -314,14 +314,14 @@ bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region,
unsigned int snoopHigh = baseAddress + regionLength;
if( (region > MEM_SNOOP_REGION3) || (snoopType > MEM_SNOOP_WB) )
- return false;
+ return false;
snoopXbaseAddress = SNOOP_BASE_ADDRESS_0 + 0x10 * region;
snoopXtopAddress = SNOOP_TOP_ADDRESS_0 + 0x10 * region;
if(regionLength == 0) /* closing the region */
{
- GT_REG_WRITE(snoopXbaseAddress,0x0000ffff);
- GT_REG_WRITE(snoopXtopAddress,0);
- return true;
+ GT_REG_WRITE(snoopXbaseAddress,0x0000ffff);
+ GT_REG_WRITE(snoopXtopAddress,0);
+ return true;
}
baseAddress = baseAddress & 0xffff0000;
data = (baseAddress >> 16) | snoopType << 16;
@@ -385,20 +385,20 @@ bool memoryGetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum)
switch (calcData)
{
case 0:
- deviceParam -> deviceWidth = 1; /* one Byte - 8-bit */
- break;
+ deviceParam -> deviceWidth = 1; /* one Byte - 8-bit */
+ break;
case 1:
- deviceParam -> deviceWidth = 2; /* two Bytes - 16-bit */
- break;
+ deviceParam -> deviceWidth = 2; /* two Bytes - 16-bit */
+ break;
case 2:
- deviceParam -> deviceWidth = 4; /* four Bytes - 32-bit */
- break;
+ deviceParam -> deviceWidth = 4; /* four Bytes - 32-bit */
+ break;
case 3:
- deviceParam -> deviceWidth = 8; /* eight Bytes - 64-bit */
- break;
+ deviceParam -> deviceWidth = 8; /* eight Bytes - 64-bit */
+ break;
default:
- deviceParam -> deviceWidth = 1;
- break;
+ deviceParam -> deviceWidth = 1;
+ break;
}
return true;
}
@@ -419,38 +419,38 @@ bool memorySetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum)
if((deviceParam -> turnOff >= 0xf) || (deviceParam -> acc2First >= 0x1f) ||
(deviceParam -> acc2Next >= 0x1f) || (deviceParam -> ale2Wr >= 0xf) ||
- (deviceParam -> wrLow >= 0xf) || (deviceParam -> wrHigh >= 0xf))
- return false;
+ (deviceParam -> wrLow >= 0xf) || (deviceParam -> wrHigh >= 0xf))
+ return false;
valueForReg = (((deviceParam -> turnOff) & 0x7) |
- (((deviceParam -> turnOff) & 0x8) << 19) |
- (((deviceParam -> acc2First) & 0xf) << 3) |
- (((deviceParam -> acc2First) & 0x10) << 19) |
- (((deviceParam -> acc2Next) & 0xf) << 7) |
- (((deviceParam -> acc2Next) & 0x10) << 20) |
- (((deviceParam -> ale2Wr) & 0x7) << 11) |
- (((deviceParam -> ale2Wr) & 0xf) << 22) |
- (((deviceParam -> wrLow) & 0x7) << 14) |
- (((deviceParam -> wrLow) & 0xf) << 23) |
- (((deviceParam -> wrHigh) & 0x7) << 17) |
- (((deviceParam -> wrHigh) & 0xf) << 24));
+ (((deviceParam -> turnOff) & 0x8) << 19) |
+ (((deviceParam -> acc2First) & 0xf) << 3) |
+ (((deviceParam -> acc2First) & 0x10) << 19) |
+ (((deviceParam -> acc2Next) & 0xf) << 7) |
+ (((deviceParam -> acc2Next) & 0x10) << 20) |
+ (((deviceParam -> ale2Wr) & 0x7) << 11) |
+ (((deviceParam -> ale2Wr) & 0xf) << 22) |
+ (((deviceParam -> wrLow) & 0x7) << 14) |
+ (((deviceParam -> wrLow) & 0xf) << 23) |
+ (((deviceParam -> wrHigh) & 0x7) << 17) |
+ (((deviceParam -> wrHigh) & 0xf) << 24));
/* insert the device width: */
switch(deviceParam->deviceWidth)
{
case 1:
- valueForReg = valueForReg | _8BIT;
- break;
+ valueForReg = valueForReg | _8BIT;
+ break;
case 2:
- valueForReg = valueForReg | _16BIT;
- break;
+ valueForReg = valueForReg | _16BIT;
+ break;
case 4:
- valueForReg = valueForReg | _32BIT;
- break;
+ valueForReg = valueForReg | _32BIT;
+ break;
case 8:
- valueForReg = valueForReg | _64BIT;
- break;
+ valueForReg = valueForReg | _64BIT;
+ break;
default:
- valueForReg = valueForReg | _8BIT;
- break;
+ valueForReg = valueForReg | _8BIT;
+ break;
}
GT_REG_WRITE(DEVICE_BANK0PARAMETERS + 4 * deviceNum, valueForReg);
return true;
diff --git a/board/evb64260/misc.S b/board/evb64260/misc.S
index 4bbf6ef66..438dea612 100644
--- a/board/evb64260/misc.S
+++ b/board/evb64260/misc.S
@@ -154,29 +154,29 @@ board_asm_init:
#endif
/* For use of the debug LEDs */
- .global led_on0
+ .global led_on0
led_on0:
- xor r18, r18, r18
- lis r18, 0x1c80
- ori r18, r18, 0x8000
- stw r18, 0x0(r18)
- sync
- blr
-
- .global led_on1
+ xor r18, r18, r18
+ lis r18, 0x1c80
+ ori r18, r18, 0x8000
+ stw r18, 0x0(r18)
+ sync
+ blr
+
+ .global led_on1
led_on1:
- xor r18, r18, r18
- lis r18, 0x1c80
- ori r18, r18, 0xc000
- stw r18, 0x0(r18)
- sync
- blr
-
- .global led_on2
+ xor r18, r18, r18
+ lis r18, 0x1c80
+ ori r18, r18, 0xc000
+ stw r18, 0x0(r18)
+ sync
+ blr
+
+ .global led_on2
led_on2:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0x0000
- stw r18, 0x0(r18)
- sync
- blr
+ xor r18, r18, r18
+ lis r18, 0x1c81
+ ori r18, r18, 0x0000
+ stw r18, 0x0(r18)
+ sync
+ blr
diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c
index 31a6a0d1d..718fe0566 100644
--- a/board/evb64260/mpsc.c
+++ b/board/evb64260/mpsc.c
@@ -131,7 +131,7 @@ mpsc_putchar_early(char ch)
static int
mpsc_putchar_sdma(char ch)
{
- volatile unsigned int *p;
+ volatile unsigned int *p;
unsigned int temp;
@@ -237,7 +237,7 @@ mpsc_getchar(void)
}
if (done == len) {
- /* nothing left in this descriptor.
+ /* nothing left in this descriptor.
* go to next one
*/
p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST;
@@ -488,7 +488,7 @@ galsdma_set_RFT(int channel)
{
unsigned int temp;
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
+ temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
temp |= 0x00000001;
GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp);
@@ -500,7 +500,7 @@ galsdma_set_SFM(int channel)
{
unsigned int temp;
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
+ temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
temp |= 0x00000002;
GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp);
@@ -512,7 +512,7 @@ galsdma_set_rxle(int channel)
{
unsigned int temp;
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
+ temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
temp |= 0x00000040;
GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp);
@@ -524,7 +524,7 @@ galsdma_set_txle(int channel)
{
unsigned int temp;
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
+ temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
temp |= 0x00000080;
GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp);
diff --git a/board/evb64260/pci.c b/board/evb64260/pci.c
index 5f3b154d5..22da74679 100644
--- a/board/evb64260/pci.c
+++ b/board/evb64260/pci.c
@@ -79,11 +79,11 @@ void pciWriteConfigReg(PCI_HOST host, unsigned int regOffset,unsigned int pciDev
unsigned int addr;
if(pciDevNum > 32) /* illegal device Number */
- return;
+ return;
if(pciDevNum == SELF) /* configure our configuration space. */
{
- pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f;
- busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000;
+ pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f;
+ busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000;
}
functionNum = regOffset & 0x00000700;
pciDevNum = pciDevNum << 11;
@@ -116,16 +116,16 @@ void pciWriteConfigReg(PCI_HOST host, unsigned int regOffset,unsigned int pciDev
unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,unsigned int pciDevNum)
{
volatile unsigned int DataForAddrReg;
- unsigned int data;
+ unsigned int data;
unsigned int functionNum;
unsigned int busNum = PCI_BUS(pciDevNum);
if(pciDevNum > 32) /* illegal device Number */
- return 0xffffffff;
+ return 0xffffffff;
if(pciDevNum == SELF) /* configure our configuration space. */
{
- pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f;
- busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000;
+ pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f;
+ busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000;
}
functionNum = regOffset & 0x00000700;
pciDevNum = pciDevNum << 11;
@@ -134,7 +134,7 @@ unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,unsigned in
GT_REG_WRITE(pci_configuration_address[host],DataForAddrReg);
GT_REG_READ(pci_configuration_address[host], &data);
if (data != DataForAddrReg)
- return 0xffffffff;
+ return 0xffffffff;
GT_REG_READ(pci_configuration_data[host], &data);
return data;
}
@@ -163,34 +163,34 @@ unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,unsigned in
*********************************************************************/
void pciOverBridgeWriteConfigReg(PCI_HOST host,
unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum,unsigned int data)
+ unsigned int pciDevNum,
+ unsigned int busNum,unsigned int data)
{
- unsigned int DataForReg;
+ unsigned int DataForReg;
unsigned int functionNum;
- functionNum = regOffset & 0x00000700;
+ functionNum = regOffset & 0x00000700;
pciDevNum = pciDevNum << 11;
regOffset = regOffset & 0xff;
busNum = busNum << 16;
if(pciDevNum == SELF) /* This board */
{
- DataForReg = ( regOffset | pciDevNum | functionNum) | BIT0;
+ DataForReg = ( regOffset | pciDevNum | functionNum) | BIT0;
}
else
{
- DataForReg = ( regOffset | pciDevNum | functionNum | busNum) |
- BIT31 | BIT0;
+ DataForReg = ( regOffset | pciDevNum | functionNum | busNum) |
+ BIT31 | BIT0;
}
GT_REG_WRITE(pci_configuration_address[host],DataForReg);
if(pciDevNum == SELF) /* This board */
{
- GT_REG_WRITE(pci_configuration_data[host],data);
+ GT_REG_WRITE(pci_configuration_data[host],data);
}
else /* configuration Transaction over the pci. */
{
- /* The PCI is working in LE Mode So it swap the Data. */
- GT_REG_WRITE(pci_configuration_data[host],WORD_SWAP(data));
+ /* The PCI is working in LE Mode So it swap the Data. */
+ GT_REG_WRITE(pci_configuration_data[host],WORD_SWAP(data));
}
}
@@ -218,8 +218,8 @@ void pciOverBridgeWriteConfigReg(PCI_HOST host,
*********************************************************************/
unsigned int pciOverBridgeReadConfigReg(PCI_HOST host,
unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum)
+ unsigned int pciDevNum,
+ unsigned int busNum)
{
unsigned int DataForReg;
unsigned int data;
@@ -231,23 +231,23 @@ unsigned int pciOverBridgeReadConfigReg(PCI_HOST host,
busNum = busNum << 16;
if (pciDevNum == SELF) /* This board */
{
- DataForReg = (regOffset | pciDevNum | functionNum) | BIT31 ;
+ DataForReg = (regOffset | pciDevNum | functionNum) | BIT31 ;
}
else /* agent on another bus */
{
- DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
- BIT0 | BIT31 ;
+ DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
+ BIT0 | BIT31 ;
}
GT_REG_WRITE(pci_configuration_address[host],DataForReg);
if (pciDevNum == SELF) /* This board */
- {
- GT_REG_READ(pci_configuration_data[host], &data);
- return data;
+ {
+ GT_REG_READ(pci_configuration_data[host], &data);
+ return data;
}
else /* The PCI is working in LE Mode So it swap the Data. */
{
- GT_REG_READ(pci_configuration_data[host], &data);
- return WORD_SWAP(data);
+ GT_REG_READ(pci_configuration_data[host], &data);
+ return WORD_SWAP(data);
}
}
@@ -356,12 +356,12 @@ unsigned int pciGetSpaceSize(PCI_HOST host, PCI_REGION region)
*********************************************************************/
void pciMapMemoryBank(PCI_HOST host, MEMORY_BANK bank, unsigned int pciDramBase,unsigned int pciDramSize)
{
- pciDramBase = pciDramBase & 0xfffff000;
+ pciDramBase = pciDramBase & 0xfffff000;
pciDramBase = pciDramBase | (pciReadConfigReg(host,
- PCI_SCS_0_BASE_ADDRESS + 4*bank,SELF) & 0x00000fff);
+ PCI_SCS_0_BASE_ADDRESS + 4*bank,SELF) & 0x00000fff);
pciWriteConfigReg(host,PCI_SCS_0_BASE_ADDRESS + 4*bank,SELF,pciDramBase);
if(pciDramSize == 0)
- pciDramSize ++;
+ pciDramSize ++;
GT_REG_WRITE(pci_scs_bank_size[host][bank], pciDramSize-1);
}
@@ -378,7 +378,7 @@ void pciMapMemoryBank(PCI_HOST host, MEMORY_BANK bank, unsigned int pciDramBase,
* Returns: false if one of the parameters is erroneous true otherwise.
*********************************************************************/
bool pciSetRegionFeatures(PCI_HOST host, PCI_ACCESS_REGIONS region,unsigned int features,
- unsigned int baseAddress,unsigned int regionLength)
+ unsigned int baseAddress,unsigned int regionLength)
{
unsigned int accessLow;
unsigned int accessHigh;
@@ -386,8 +386,8 @@ bool pciSetRegionFeatures(PCI_HOST host, PCI_ACCESS_REGIONS region,unsigned int
if(regionLength == 0) /* close the region. */
{
- pciDisableAccessRegion(host, region);
- return true;
+ pciDisableAccessRegion(host, region);
+ return true;
}
/* base Address is store is bits [11:0] */
accessLow = (baseAddress & 0xfff00000) >> 20;
@@ -464,21 +464,21 @@ bool pciArbiterDisable(PCI_HOST host)
* Returns: true
*********************************************************************/
bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent,
- PCI_AGENT_PARK externalAgent0,
- PCI_AGENT_PARK externalAgent1,
- PCI_AGENT_PARK externalAgent2,
- PCI_AGENT_PARK externalAgent3,
- PCI_AGENT_PARK externalAgent4,
- PCI_AGENT_PARK externalAgent5)
+ PCI_AGENT_PARK externalAgent0,
+ PCI_AGENT_PARK externalAgent1,
+ PCI_AGENT_PARK externalAgent2,
+ PCI_AGENT_PARK externalAgent3,
+ PCI_AGENT_PARK externalAgent4,
+ PCI_AGENT_PARK externalAgent5)
{
unsigned int regData;
unsigned int writeData;
GT_REG_READ(pci_arbiter_control[host],&regData);
writeData = (internalAgent << 14) + (externalAgent0 << 15) + \
- (externalAgent1 << 16) + (externalAgent2 << 17) + \
- (externalAgent3 << 18) + (externalAgent4 << 19) + \
- (externalAgent5 << 20);
+ (externalAgent1 << 16) + (externalAgent2 << 17) + \
+ (externalAgent3 << 18) + (externalAgent4 << 19) + \
+ (externalAgent5 << 20);
regData = (regData & ~(0x7f<<14)) | writeData;
GT_REG_WRITE(pci_arbiter_control[host],regData);
return true;
@@ -498,8 +498,8 @@ bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent,
* Returns: false if one of the parameters is wrong otherwise return true.
*********************************************************************/
bool pciSetRegionSnoopMode(PCI_HOST host, PCI_SNOOP_REGION region,PCI_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength)
+ unsigned int baseAddress,
+ unsigned int regionLength)
{
unsigned int snoopXbaseAddress;
unsigned int snoopXtopAddress;
@@ -507,14 +507,14 @@ bool pciSetRegionSnoopMode(PCI_HOST host, PCI_SNOOP_REGION region,PCI_SNOOP_TYPE
unsigned int snoopHigh = baseAddress + regionLength;
if( (region > PCI_SNOOP_REGION3) || (snoopType > PCI_SNOOP_WB) )
- return false;
+ return false;
snoopXbaseAddress = pci_snoop_control_base_0_low[host] + 0x10 * region;
snoopXtopAddress = pci_snoop_control_top_0[host] + 0x10 * region;
if(regionLength == 0) /* closing the region */
{
- GT_REG_WRITE(snoopXbaseAddress,0x0000ffff);
- GT_REG_WRITE(snoopXtopAddress,0);
- return true;
+ GT_REG_WRITE(snoopXbaseAddress,0x0000ffff);
+ GT_REG_WRITE(snoopXtopAddress,0);
+ return true;
}
baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */
data = (baseAddress >> 20) | snoopType << 12;
@@ -533,12 +533,12 @@ static int gt_read_config_dword(struct pci_controller *hose,
int offset, u32* value)
{
int bus = PCI_BUS(dev);
-
+
if ((bus == local_buses[0]) || (bus == local_buses[1])){
- *value = pciReadConfigReg((PCI_HOST) hose->cfg_addr, offset,
+ *value = pciReadConfigReg((PCI_HOST) hose->cfg_addr, offset,
PCI_DEV(dev));
} else {
- *value = pciOverBridgeReadConfigReg((PCI_HOST) hose->cfg_addr,
+ *value = pciOverBridgeReadConfigReg((PCI_HOST) hose->cfg_addr,
offset, PCI_DEV(dev), bus);
}
return 0;
@@ -551,10 +551,10 @@ static int gt_write_config_dword(struct pci_controller *hose,
int bus = PCI_BUS(dev);
if ((bus == local_buses[0]) || (bus == local_buses[1])){
- pciWriteConfigReg((PCI_HOST)hose->cfg_addr, offset,
+ pciWriteConfigReg((PCI_HOST)hose->cfg_addr, offset,
PCI_DEV(dev), value);
} else {
- pciOverBridgeWriteConfigReg((PCI_HOST)hose->cfg_addr, offset,
+ pciOverBridgeWriteConfigReg((PCI_HOST)hose->cfg_addr, offset,
PCI_DEV(dev), value, bus);
}
return 0;
diff --git a/board/evb64260/sdram_init.c b/board/evb64260/sdram_init.c
index ff98e4db2..361656574 100644
--- a/board/evb64260/sdram_init.c
+++ b/board/evb64260/sdram_init.c
@@ -155,7 +155,7 @@ NSto10PS(unsigned char spd_byte)
static int
check_dimm(uchar slot, sdram_info_t *info)
{
- /* assume 2 dimms, 2 banks each 256M - we dont have an
+ /* assume 2 dimms, 2 banks each 256M - we dont have an
* dimm i2c so rely on the detection routines later */
memset(info, 0, sizeof(*info));
@@ -192,7 +192,7 @@ check_dimm(uchar slot, sdram_info_t *info)
get_clocks ();
- tmemclk = 1000000000 / (gd->bus_clk / 100); /* in 10 ps units */
+ tmemclk = 1000000000 / (gd->bus_clk / 100); /* in 10 ps units */
#ifdef CONFIG_EVB64260_750CX
if (0 != slot) {
@@ -284,7 +284,7 @@ check_dimm(uchar slot, sdram_info_t *info)
#ifdef CFG_BROKEN_CL2
if (info->tpar == 2){
info->tpar = 3;
- DP(printf("tpar fixed-up to: %d\n", info->tpar));
+ DP(printf("tpar fixed-up to: %d\n", info->tpar));
}
#endif
/* compute the module DRB size */
@@ -310,7 +310,7 @@ check_dimm(uchar slot, sdram_info_t *info)
static int
setup_sdram_common(sdram_info_t info[2])
{
- ulong tmp;
+ ulong tmp;
int tpar=2, tras_clocks=5, registered=1, ecc=2;
if(!info[0].banks && !info[1].banks) return 0;
@@ -500,7 +500,7 @@ initdram(int board_type)
{
ulong checkbank[4] = { [0 ... 3] = 0 };
int bank_no;
- ulong total;
+ ulong total;
int nhr;
sdram_info_t dimm_info[2];
@@ -608,7 +608,7 @@ initdram(int board_type)
* chips)
*/
if (checkbank[2]==0 && checkbank[3]==0) {
- dimm_info[0].ecc=2;
+ dimm_info[0].ecc=2;
GT_REG_WRITE(SDRAM_TIMING, GTREGREAD(SDRAM_TIMING) | (1 << 13));
/* TODO: do we have to run MRS cycles again? */
}
@@ -624,6 +624,6 @@ initdram(int board_type)
dump_dimm_info(&dimm_info[1]);
#endif
/* TODO: return at MOST 256M? */
- /* return total > GB/4 ? GB/4 : total; */
+ /* return total > GB/4 ? GB/4 : total; */
return total;
}
diff --git a/board/evb64260/u-boot.lds b/board/evb64260/u-boot.lds
index de50bf49c..0dfa8c000 100644
--- a/board/evb64260/u-boot.lds
+++ b/board/evb64260/u-boot.lds
@@ -106,6 +106,11 @@ SECTIONS
_edata = .;
PROVIDE (edata = .);
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
diff --git a/board/evb64260/zuma_pbb.c b/board/evb64260/zuma_pbb.c
index 10c484576..531b16b46 100644
--- a/board/evb64260/zuma_pbb.c
+++ b/board/evb64260/zuma_pbb.c
@@ -3,7 +3,6 @@
#if (CONFIG_COMMANDS & CFG_CMD_BSP)
#include <command.h>
-#include <cmd_bsp.h>
#endif
#include <pci.h>
@@ -16,9 +15,11 @@
#define PAT_HI 0x04050607
static PBB_DMA_REG_MAP *zuma_pbb_reg = NULL;
-
static char test_buf1[2048];
static char test_buf2[2048];
+void zuma_init_pbb(void);
+int zuma_mbox_init(void);
+int zuma_test_dma(int cmd, int size);
int zuma_test_dma (int cmd, int size)
{
@@ -197,4 +198,23 @@ do_zuma_init_mbox (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return 0;
}
+cmd_tbl_t U_BOOT_CMD(zuma_init_pbb) = MK_CMD_ENTRY(
+ "zinit", 1, 0, do_zuma_init_pbb,
+ "zinit - init zuma pbb\n",
+ "\n"
+ " - init zuma pbb\n"
+);
+cmd_tbl_t U_BOOT_CMD(zuma_test_dma) = MK_CMD_ENTRY(
+ "zdtest", 3, 1, do_zuma_test_dma,
+ "zdtest - run dma test\n",
+ "[cmd [count]]\n"
+ " - run dma cmd (w=0,v=1,cp=2,cmp=3,wi=4,vi=5), count bytes\n"
+);
+cmd_tbl_t U_BOOT_CMD(zuma_init_mbox) = MK_CMD_ENTRY(
+ "zminit", 1, 0, do_zuma_init_mbox,
+ "zminit - init zuma mbox\n",
+ "\n"
+ " - init zuma mbox\n"
+);
+
#endif /* CFG_CMD_BSP */
diff --git a/board/evb64260/zuma_pbb.h b/board/evb64260/zuma_pbb.h
index 663e10c97..300b2fe8c 100644
--- a/board/evb64260/zuma_pbb.h
+++ b/board/evb64260/zuma_pbb.h
@@ -178,7 +178,7 @@ typedef struct _tag_dma_desc_level{
V32 res1:8; /* bits 24-31 */
} _le_bits;
V8 byte[4];
- V32 word;
+ V32 word;
} desc;
V32 pad1;
} DMA_DESC_LEVEL;
@@ -214,7 +214,7 @@ typedef struct _tag_pbb_dma_reg_map {
/* 39/40 (0x138/0x140) */
union {
- /* NOTE!! 4 dwords */
+ /* NOTE!! 4 dwords */
struct {
V32 channel_3:8;
V32 channel_2:8;