aboutsummaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorSteve Sakoman <steve@sakoman.com>2010-07-20 14:56:07 -0700
committerSandeep Paulraj <s-paulraj@ti.com>2010-08-05 10:11:20 -0400
commit674e0b217f794800048d80de09a71255b890a53e (patch)
tree5f9696df1adcaa7414390d42a0509962c54fcc77 /arch
parent2ad853c3485e08612bb7725ba50d35b679978ebc (diff)
downloadu-boot-linaro-stable-674e0b217f794800048d80de09a71255b890a53e.tar.gz
ARMV7: Fix udelay for OMAP4
The OMAP4 x-load code sets gptimer1 clock source to 32Khz. This isn't acceptable for udelay. This patch changes from gptimer1 to gptimer2, which uses sys_clk at 38.4 Mhz. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/omap-common/timer.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c
index 69e285ff1..6b8cf7ba2 100644
--- a/arch/arm/cpu/armv7/omap-common/timer.c
+++ b/arch/arm/cpu/armv7/omap-common/timer.c
@@ -41,12 +41,8 @@ static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
/*
* Nothing really to do with interrupts, just starts up a counter.
- * We run the counter with 13MHz, divided by 8, resulting in timer
- * frequency of 1.625MHz. With 32bit counter register, counter
- * overflows in ~44min
*/
-/* 13MHz / 8 = 1.625MHz */
#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
#define TIMER_LOAD_VAL 0xffffffff
@@ -84,11 +80,6 @@ void set_timer(ulong t)
/* delay x useconds */
void __udelay(unsigned long usec)
{
-#if defined(CONFIG_OMAP44XX)
- /* TODO temporary hack until OMAP4 clock setup routines are present */
- if (usec > 1000)
- usec = usec/1000;
-#endif
long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
unsigned long now, last = readl(&timer_base->tcrr);