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authorThomas Chou <thomas@wytron.com.tw>2010-04-17 23:34:40 +0800
committerScott McNutt <smcnutt@psyent.com>2010-04-24 18:21:22 -0400
commit7e812f2e9cdac80f6287d4aee5deb434597c4f8b (patch)
treeeb35187ca13557946626ddfdf0837515501d3fb8 /arch/nios2
parent0dc1c7f692c15fe1745e3eeab918e98ee6126677 (diff)
downloadu-boot-linaro-stable-7e812f2e9cdac80f6287d4aee5deb434597c4f8b.tar.gz
nios2: add dma_alloc_coherent
This function return cache-line aligned allocation which is mapped to uncached io region. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Diffstat (limited to 'arch/nios2')
-rw-r--r--arch/nios2/include/asm/dma-mapping.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h
new file mode 100644
index 000000000..1350e3b96
--- /dev/null
+++ b/arch/nios2/include/asm/dma-mapping.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_NIOS2_DMA_MAPPING_H
+#define __ASM_NIOS2_DMA_MAPPING_H
+
+/* dma_alloc_coherent() return cache-line aligned allocation which is mapped
+ * to uncached io region.
+ *
+ * IO_REGION_BASE should be defined in board config header file
+ * 0x80000000 for nommu, 0xe0000000 for mmu
+ */
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+ void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
+ if (!addr)
+ return 0;
+ flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
+ *handle = ((unsigned long)addr +
+ (CONFIG_SYS_DCACHELINE_SIZE - 1)) &
+ ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
+ return (void *)(*handle | IO_REGION_BASE);
+}
+
+#endif /* __ASM_NIOS2_DMA_MAPPING_H */