diff options
| author | Jason Chen <b02280@freescale.com> | 2012-01-12 15:36:26 +0800 |
|---|---|---|
| committer | John Rigby <john.rigby@linaro.org> | 2012-04-23 07:48:48 -0600 |
| commit | 996306c921cefe11717f13e2b026a48cea414cf0 (patch) | |
| tree | b8a15b31f6b997057171e89e9ecfae8fd3ec72e8 /arch/arm | |
| parent | 459a66c10e0033a86d34e5c404d779aabcbefe78 (diff) | |
arm: imx6q: add axi cache and qos setting
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 543b2cc6d..53d671f1f 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -77,10 +77,21 @@ void init_aips(void) writel(0x00000000, &aips2->opacr4); } +void init_axi_cache_qos(void) +{ + /* enable AXI cache for VDOA/VPU/IPU */ + writel(0xf00000ff, IOMUXC_BASE_ADDR + 0x010); + /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ + writel(0x007f007f, IOMUXC_BASE_ADDR + 0x018); + writel(0x007f007f, IOMUXC_BASE_ADDR + 0x01c); +} + int arch_cpu_init(void) { init_aips(); + init_axi_cache_qos(); + return 0; } #endif |