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authorShiraz Hashim <shiraz.hashim@st.com>2012-05-07 13:07:00 +0530
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:42 +0200
commitf28e5c946d6c88b1c8639896863c7ad7d8889bf4 (patch)
tree532ae86ae7cf78b9b60e73444e296c57b21ee59c /arch/arm/include
parent7c885a0e5532abcd6bc802d21a7858420e5c127b (diff)
downloadu-boot-linaro-stable-f28e5c946d6c88b1c8639896863c7ad7d8889bf4.tar.gz
SPEAr: Correct SoC ID offset in misc configuration space
SoC Core ID offset is 0x30 in miscellaneous configuration address space. It was wrongly mentioned as periph2 clk enable. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-spear/spr_misc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-spear/spr_misc.h b/arch/arm/include/asm/arch-spear/spr_misc.h
index 384944d33..b8fcf49fe 100644
--- a/arch/arm/include/asm/arch-spear/spr_misc.h
+++ b/arch/arm/include/asm/arch-spear/spr_misc.h
@@ -37,7 +37,7 @@ struct misc_regs {
u32 amba_clk_cfg; /* 0x24 */
u32 periph_clk_cfg; /* 0x28 */
u32 periph1_clken; /* 0x2C */
- u32 periph2_clken; /* 0x30 */
+ u32 soc_core_id; /* 0x30 */
u32 ras_clken; /* 0x34 */
u32 periph1_rst; /* 0x38 */
u32 periph2_rst; /* 0x3C */