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authorValentin Longchamp <valentin.longchamp@keymile.com>2012-06-01 01:31:02 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:32 +0200
commitac486e3ba16c37514d135c359f61ed6e32a2921d (patch)
treeb6d308d95e84fcf9330d2fafb62a66f0af921971 /arch/arm/include
parentca880679dda63f8d58393526c7e3257f772ccabe (diff)
downloadu-boot-linaro-stable-ac486e3ba16c37514d135c359f61ed6e32a2921d.tar.gz
kw_spi: support spi_claim/release_bus functions
These two function nows ensure that the MPP is configured correctly for the SPI controller before any SPI access, and restore the initial configuration when the access is over. Since the used pins for the SPI controller can differ (2 possibilities for each signal), the used pins are configured with CONFIG_SYS_KW_SPI_MPP. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-kirkwood/spi.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h b/arch/arm/include/asm/arch-kirkwood/spi.h
index 1d5043f94..c79bed7ed 100644
--- a/arch/arm/include/asm/arch-kirkwood/spi.h
+++ b/arch/arm/include/asm/arch-kirkwood/spi.h
@@ -37,6 +37,17 @@ struct kwspi_registers {
u32 irq_mask; /* 0x10614 */
};
+/* They are used to define CONFIG_SYS_KW_SPI_MPP
+ * each of the below #defines selects which mpp is
+ * configured for each SPI signal in spi_claim_bus
+ * bit 0: selects pin for MOSI (MPP1 if 0, MPP6 if 1)
+ * bit 1: selects pin for SCK (MPP2 if 0, MPP10 if 1)
+ * bit 2: selects pin for MISO (MPP3 if 0, MPP11 if 1)
+ */
+#define MOSI_MPP6 (1 << 0)
+#define SCK_MPP10 (1 << 1)
+#define MISO_MPP11 (1 << 2)
+
#define KWSPI_CLKPRESCL_MASK 0x1f
#define KWSPI_CSN_ACT 1 /* Activates serial memory interface */
#define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */