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authorJason Liu <jason.hui@linaro.org>2012-04-11 01:18:02 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:25 +0200
commit0d952e5d2eef9320338a87007959ce0d80a264e3 (patch)
tree0d7810b0e2fb312d58fd8f81a3bfb1388cd25809 /arch/arm/include
parentc6baaa670580e1b3137518896d199ddc75503459 (diff)
downloadu-boot-linaro-stable-0d952e5d2eef9320338a87007959ce0d80a264e3.tar.gz
i.mx: i.mx6x: NO_MUX_I/NO_PAD_I not set correctly
If one PAD does not have mux or pad config register, we need set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct Signed-off-by: Jason Liu <jason.hui@linaro.org> CC: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-mx6/mx6x_pins.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-mx6/mx6x_pins.h b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
index afaa068bb..9979651b0 100644
--- a/arch/arm/include/asm/arch-mx6/mx6x_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
@@ -48,8 +48,8 @@
#define PAD_CTL_SRE_FAST (1 << 0)
#define PAD_CTL_SRE_SLOW (0 << 0)
-#define NO_MUX_I 0x3FF
-#define NO_PAD_I 0x7FF
+#define NO_MUX_I 0
+#define NO_PAD_I 0
enum {
MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 = IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, 0),