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authorLokesh Vutla <lokeshvutla@ti.com>2012-05-29 19:26:43 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:35 +0200
commit38f25b125e446ab4a64a54e9aa2c10023d8eccc3 (patch)
treeb2f9d6a45735cd89f68b7d72f24532c06da0ae0c /arch/arm/include/asm/arch-omap5/sys_proto.h
parent784229cc25feee0bb3f2bba6c1318f4d73c293e0 (diff)
downloadu-boot-linaro-stable-38f25b125e446ab4a64a54e9aa2c10023d8eccc3.tar.gz
OMAP4+: Force DDR in self-refresh after warm reset
Errata ID:i727 Description: The refresh rate is programmed in the EMIF_SDRAM_REF_CTRL[15:0] REG_REFRESH_RATE parameter taking into account frequency of the device. When a warm reset is applied on the system, the OMAP processor restarts with another OPP and so frequency is not the same. Due to this frequency change, the refresh rate will be too low and could result in an unexpected behavior on the memory side. Workaround: The workaround is to force self-refresh when coming back from the warm reset with the following sequence: • Set EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE to 0x2 • Set EMIF_PWR_MGMT_CTRL[7:4] REG_SR_TIM to 0x0 • Do a dummy read (loads automatically new value of sr_tim) This will reduce the risk of memory content corruption, but memory content can't be guaranteed after a warm reset. This errata is impacted on OMAP4430: 1.0, 2.0, 2.1, 2.2, 2.3 OMAP4460: 1.0, 1.1 OMAP4470: 1.0 OMAP5430: 1.0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5/sys_proto.h')
-rw-r--r--arch/arm/include/asm/arch-omap5/sys_proto.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h
index b3bbdb7cd..74feb9027 100644
--- a/arch/arm/include/asm/arch-omap5/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -58,6 +58,7 @@ void do_io_settings(void);
void omap_vc_init(u16 speed_khz);
int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
u32 warm_reset(void);
+void force_emif_self_refresh(void);
/*
* This is used to verify if the configuration header