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authorRob Herring <rob.herring@calxeda.com>2012-05-02 17:01:03 -0500
committerJohn Rigby <john.rigby@linaro.org>2012-12-06 13:51:49 -0700
commit3c36684e1c5bd352382eda70b5419b295a1fe62d (patch)
tree89bd55ac8f6f6cd29ff948f3f404c03ba016d7e4 /arch/arm/cpu/armv7/highbank/timer.c
parentf81fbd7b5736e7c187ccb65ddc559d914d98e66d (diff)
downloadu-boot-linaro-stable-3c36684e1c5bd352382eda70b5419b295a1fe62d.tar.gz
ARM: highbank: set timer prescaler to 256
The 150MHz clock rate gives u-boot time functions problems and there's no benefit to a fast clock, so lower the rate. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'arch/arm/cpu/armv7/highbank/timer.c')
-rw-r--r--arch/arm/cpu/armv7/highbank/timer.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/highbank/timer.c b/arch/arm/cpu/armv7/highbank/timer.c
index 0f985e298..81dbb2715 100644
--- a/arch/arm/cpu/armv7/highbank/timer.c
+++ b/arch/arm/cpu/armv7/highbank/timer.c
@@ -26,7 +26,7 @@
#undef SYSTIMER_BASE
#define SYSTIMER_BASE 0xFFF34000 /* Timer 0 and 1 base */
-#define SYSTIMER_RATE 150000000
+#define SYSTIMER_RATE (150000000 / 256)
static ulong timestamp;
static ulong lastinc;
@@ -40,9 +40,11 @@ int timer_init(void)
/*
* Setup timer0
*/
+ writel(0, &systimer_base->timer0control);
writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
- writel(SYSTIMER_EN | SYSTIMER_32BIT, &systimer_base->timer0control);
+ writel(SYSTIMER_EN | SYSTIMER_32BIT | SYSTIMER_PRESC_256,
+ &systimer_base->timer0control);
reset_timer_masked();