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authorKumar Gala <galak@kernel.crashing.org>2010-12-30 12:09:53 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-01-14 01:32:21 -0600
commita09b9b68d492e978ef0e14cae93ff9cfbc2d3e4b (patch)
tree07f0d677a4d7ac227abc90cdbbd90d306641f76e /README
parent213ac73e2caff8b477c31f85d8132f8cc116f366 (diff)
downloadu-boot-linaro-stable-a09b9b68d492e978ef0e14cae93ff9cfbc2d3e4b.tar.gz
powerpc/8xxx: Refactor SRIO initialization into common code
Moved the SRIO init out of corenet_ds and into common code for 8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe controllers for SRIO. We utilize the fact that SRIO is over serdes to determine if its configured or not and thus can setup the LAWs needed for it dynamically. We additionally update the device tree (to remove the SRIO nodes) if the board doesn't have SRIO enabled. Introduced the following standard defines for board config.h: CONFIG_SYS_SRIO - Chip has SRIO or not CONFIG_SRIO1 - Board has SRIO 1 port available CONFIG_SRIO2 - Board has SRIO 2 port available (where 'n' is the port #) CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup) CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup) [ These mimic what we have for PCI and PCIe controllers ] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'README')
-rw-r--r--README18
1 files changed, 18 insertions, 0 deletions
diff --git a/README b/README
index d7a23cda9..556bf59c1 100644
--- a/README
+++ b/README
@@ -2783,6 +2783,24 @@ Low Level (hardware related) configuration options:
Disable PCI-Express on systems where it is supported but not
required.
+- CONFIG_SYS_SRIO:
+ Chip has SRIO or not
+
+- CONFIG_SRIO1:
+ Board has SRIO 1 port available
+
+- CONFIG_SRIO2:
+ Board has SRIO 2 port available
+
+- CONFIG_SYS_SRIOn_MEM_VIRT:
+ Virtual Address of SRIO port 'n' memory region
+
+- CONFIG_SYS_SRIOn_MEM_PHYS:
+ Physical Address of SRIO port 'n' memory region
+
+- CONFIG_SYS_SRIOn_MEM_SIZE:
+ Size of SRIO port 'n' memory region
+
- CONFIG_SPD_EEPROM
Get DDR timing information from an I2C EEPROM. Common
with pluggable memory modules such as SODIMMs