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authorShawn Guo <shawn.gsc@gmail.com>2010-10-27 23:36:04 +0800
committerStefano Babic <sbabic@denx.de>2010-10-28 11:42:34 +0200
commit888b4f435f74ae8ba7a5df552b119ba25c7438dc (patch)
treeefed308acd3d23639ca17e9a17be481943989e41
parent9a0044183a148ab553e296848cbfa4338fc83323 (diff)
downloadu-boot-linaro-stable-888b4f435f74ae8ba7a5df552b119ba25c7438dc.tar.gz
mx51evk: Fix 2 hours reset issue
The mx51evk u-boot has an issue that system will get reset every 2 hours. MC13892 has an inside charge timer which expires in 120 minutes. If ICHRG and CHGAUTOB are not set properly, this timer expiration will get system power recycled. Since mx51evk has no Li-Ion battery on board, the patch sets ICHRG in externally powered mode and sets CHGAUTOB bit to avoid automatic charging, so that system will not get reset by this timer expiration. The patch also corrects the bit field definition of register 48 (Charger 0) per latest MC13892 Reference Manual. Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
-rw-r--r--board/freescale/mx51evk/mx51evk.c8
-rw-r--r--include/mc13892.h16
2 files changed, 12 insertions, 12 deletions
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index c8d7d3964..0b58b1b33 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -188,10 +188,10 @@ static void power_init(void)
val &= ~PWGT2SPIEN;
pmic_reg_write(REG_POWER_MISC, val);
- /* Write needed to update Charger 0 */
- pmic_reg_write(REG_CHARGE, VCHRG0 | VCHRG1 | VCHRG2 |
- ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | ICHRGTR0 |
- OVCTRL1 | UCHEN | CHRGLEDEN | CYCLB);
+ /* Externally powered */
+ val = pmic_reg_read(REG_CHARGE);
+ val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB;
+ pmic_reg_write(REG_CHARGE, val);
/* power up the system first */
pmic_reg_write(REG_POWER_MISC, PWUP);
diff --git a/include/mc13892.h b/include/mc13892.h
index 791e3ec87..61c3e6e62 100644
--- a/include/mc13892.h
+++ b/include/mc13892.h
@@ -29,24 +29,24 @@
/* REG_CHARGE */
-#define VCHRG0 0
+#define VCHRG0 (1 << 0)
#define VCHRG1 (1 << 1)
#define VCHRG2 (1 << 2)
#define ICHRG0 (1 << 3)
#define ICHRG1 (1 << 4)
#define ICHRG2 (1 << 5)
#define ICHRG3 (1 << 6)
-#define ICHRGTR0 (1 << 7)
-#define ICHRGTR1 (1 << 8)
-#define ICHRGTR2 (1 << 9)
+#define TREN (1 << 7)
+#define ACKLPB (1 << 8)
+#define THCHKB (1 << 9)
#define FETOVRD (1 << 10)
#define FETCTRL (1 << 11)
#define RVRSMODE (1 << 13)
-#define OVCTRL0 (1 << 15)
-#define OVCTRL1 (1 << 16)
-#define UCHEN (1 << 17)
+#define PLIM0 (1 << 15)
+#define PLIM1 (1 << 16)
+#define PLIMDIS (1 << 17)
#define CHRGLEDEN (1 << 18)
-#define CHRGRAWPDEN (1 << 19)
+#define CHGTMRRST (1 << 19)
#define CHGRESTART (1 << 20)
#define CHGAUTOB (1 << 21)
#define CYCLB (1 << 22)